Re: [PATCH] add a clear_pages function to clear pages of higherorder

[David S. Miller]

On Thu, 24 Mar 2005 14:49:55 -0800 (PST)
Christoph Lameter <clameter@xxxxxxxxxxxx> wrote:

> Could you help me fix up this patch replacing the old clear_pages patch?

Ok, first you need to mark the order and gfp arguments as unsigned
for mm/page_alloc.c:prep_zero_page() so that it matches the prototype
you added to include/linux/gfp.h else the compiler warns a lot.

Next, in the same function in mm/page_alloc.c, "PageHighmem()" is typo'd, it should be
"PageHighMem()".

The clear_cold() call on the next line needs a semicolon.

Erm... were any of your test builds done with the new CONFIG_CLEAR_COLD
option enabled? :-)

Next, replace your arch/sparc64/lib/clear_page.S diff with this one and
things would be working and we'll be using the proper temporal vs.
non-temporal stores on that platform.

===== arch/sparc64/lib/clear_page.S 1.1 vs edited =====
--- 1.1/arch/sparc64/lib/clear_page.S	2004-08-08 19:54:07 -07:00
+++ edited/arch/sparc64/lib/clear_page.S	2005-03-24 15:56:33 -08:00
@@ -72,26 +72,34 @@
 	mov		1, %o4
 
 clear_page_common:
-	VISEntryHalf
 	membar		#StoreLoad | #StoreStore | #LoadStore
-	fzero		%f0
 	sethi		%hi(PAGE_SIZE/64), %o1
 	mov		%o0, %g1		! remember vaddr for tlbflush
-	fzero		%f2
 	or		%o1, %lo(PAGE_SIZE/64), %o1
-	faddd		%f0, %f2, %f4
-	fmuld		%f0, %f2, %f6
-	faddd		%f0, %f2, %f8
-	fmuld		%f0, %f2, %f10
 
-	faddd		%f0, %f2, %f12
-	fmuld		%f0, %f2, %f14
-1:	stda		%f0, [%o0 + %g0] ASI_BLK_P
+#define PREFETCH(x, y)	prefetch x, y
+#define PREFETCH_CODE	2
+
+	PREFETCH([%o0 + 0x000], PREFETCH_CODE)
+	PREFETCH([%o0 + 0x040], PREFETCH_CODE)
+	PREFETCH([%o0 + 0x080], PREFETCH_CODE)
+	PREFETCH([%o0 + 0x0c0], PREFETCH_CODE)
+	PREFETCH([%o0 + 0x100], PREFETCH_CODE)
+	PREFETCH([%o0 + 0x140], PREFETCH_CODE)
+	PREFETCH([%o0 + 0x180], PREFETCH_CODE)
+1:
+	stx		%g0, [%o0 + 0x00]
+	stx		%g0, [%o0 + 0x08]
+	stx		%g0, [%o0 + 0x10]
+	stx		%g0, [%o0 + 0x18]
+	stx		%g0, [%o0 + 0x20]
+	stx		%g0, [%o0 + 0x28]
+	stx		%g0, [%o0 + 0x30]
+	stx		%g0, [%o0 + 0x38]
+	PREFETCH([%o0 + 0x1c0], PREFETCH_CODE)
 	subcc		%o1, 1, %o1
 	bne,pt		%icc, 1b
 	 add		%o0, 0x40, %o0
-	membar		#Sync
-	VISExitHalf
 
 	brz,pn		%o4, out
 	 nop
@@ -101,5 +109,32 @@
 	stw		%o2, [%g6 + TI_PRE_COUNT]
 
 out:	retl
+	 nop
+
+	.globl		clear_cold
+clear_cold:		/* %o0=dest, %o1=order */
+	sethi		%hi(PAGE_SIZE/64), %o2
+	clr		%o4
+	or		%o2, %lo(PAGE_SIZE/64), %o2
+	sllx		%o2, %o1, %o1
+	VISEntryHalf
+	membar		#StoreLoad | #StoreStore | #LoadStore
+	fzero		%f0
+	fzero		%f2
+	faddd		%f0, %f2, %f4
+	fmuld		%f0, %f2, %f6
+	faddd		%f0, %f2, %f8
+	fmuld		%f0, %f2, %f10
+
+	faddd		%f0, %f2, %f12
+	fmuld		%f0, %f2, %f14
+2:	stda		%f0, [%o0 + %g0] ASI_BLK_P
+	subcc		%o1, 1, %o1
+	bne,pt		%icc, 2b
+	 add		%o0, 0x40, %o0
+	membar		#Sync
+	VISExitHalf
+
+	retl
 	 nop
 

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