Re: [PATCH 1/2] pci: Block config access during BIST (resend)

[Grant Grundler]

On Sat, Sep 03, 2005 at 06:37:52PM -0500, Brian King wrote:
...
> Without the locking, we introduce a race condition.
> 
> CPU 0                                           CPU 1
> 
> 					pci_block_user_cfg_access
> 						pci_save_state
> pci_read_user_config_space
> 	check block_ucfg_access
> 						set block_ucfg_access
> 					other code that puts the device
> 					in a state such that it cannot
> 					handle read config i/o, such as
> 					running BIST.
> 
> 	pci read config

Ok this is good example - I see what the problem is.
You could use the following sequence too then:
	pci_block_user_cfg_access
		pci_save_state
		block_ucfg_access = 1
		mb()
		while (spin_is_locked(&pci_lock))
			relax_cpu();

Think this is sufficient?

> Granted, for the specific usage scenario in ipr, where I am using this 
> to block config space over BIST, I use a pci config write to start BIST, 
> which would end up being a point of synchronization, but that seems a 
> bit non-obvious and limits how the patch can be used by others...

Yes, agreed.

grant
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