Re: [PATCH] MSI interrupts: disallow when no LAPIC/IOAPIC support

[Randy.Dunlap]

On Mon, 26 Sep 2005 22:48:40 -0600 Grant Grundler wrote:

> On Mon, Sep 26, 2005 at 08:11:56PM -0700, Randy.Dunlap wrote:
> > From: Randy Dunlap <rdunlap@xxxxxxxxxxxx>
> > 
> > MSI requires local APIC + IO APIC support (according to
> > drivers/pci/Kconfig),
> 
> The purpose of MSI is to bypass the IO APIC.
> I'm not aware of any dependency on IO APIC in HW.
> I suspect the dependency in the Kconfig is historical
> because of how the x86 source code is structured:
> config X86_LOCAL_APIC
>         bool
>         depends on X86_UP_APIC || ((X86_VISWS || SMP) && !X86_VOYAGER)
>         default y
> 
> essentially, LOCAL_APIC gets enabled if "UP_APIC or SMP".
> I've no clue why folks thought it was better to ignore
> the IO APIC on UP kernels.
> 
> I'm pretty sure one only needs a local APIC support.
> Local APIC responds to 0xfee00000 range of addresses and
> directs the interrupt to a CPU.

Thanks.  Can't say I'm surprised at that info.

> > but if a kernel is built with all of
> > those (APICs + CONFIG_PCI_MSI) and then booted with "nosmp" or
> > "max_cpus=0|1" or "noapic" or "nolapic", MSI also should be
> > disabled, otherwise the interrupt routing is bad (so that only
> > using "irqpoll" helps).
> 
> UP vs SMP is orthogonal to MSI support wrt HW.
> I suppose this is another historical artifact of
> APICs being used with SMP x86 boxes first.

"nosmp" (currently) means 1 CPU and no LAPICs/no IOAPICs.
It doesn't have to be that way, but yes, I suspect that it's
mostly historical, plus a method of getting to a lowest common
hardware boot sequence, which is sometimes nice for debugging
or installation.

Nevertheless, there is a problem here.  What do you suggest
to solve it?  Just making PCI_MSI depend on Local APIC support,
or something else?

[Kernel is assigning MSI interrupts, but then they are "lost."
Using "irqpoll" will find them, but that's a performance penalty.]

---
~Randy
You can't do anything without having to do something else first.
-- Belefant's Law
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