Re: [PATCH 2.6-git 3/3] SPI core refresh: SPI/PNX bus driver and EEPROM driver

[David Brownell]

> --- /dev/null
> +++ linux-2.6.orig/drivers/spi/pnx4008-eeprom.c
> @@ -0,0 +1,121 @@
> ...
> +#define EEPROM_SIZE		256
> +#define DRIVER_NAME		"EEPROM"
> +#define READ_BUFF_SIZE 160

Wouldn't it be better to have an EEPROM driver that's not hard-wired
to this particular devel board?  And which could work on at least all
chips using eight bit addressing?

This seems to match the 25020 series SPI EEPROMS.  (2 Kbits, 256 bytes.)
But the 25010 and 25040 also use 8 bit address protoocol ... and then
there are also chips using 16 bit addresses, and 24 bit ones.

Shouldn't board init code be able to just say "25640 at spi1 chipselect 3",
and have the driver know that means 8 KBytes with pagesize 32?

- Dave

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