Re: [PATCH] (Longhaul 1/5) PCI: Protect bus master DMA from Longhaulby rw semaphores

[Robert Hancock]

Rafał Bilski wrote:
> > It needs there to be no bus mastering occuring at the time
> > of a CPU speed transition. Though I'm unable to find the part that me
> ntions
> > this in the specs I have right now.
>
> > Dave
>
> "Once this is set, the processor will switch to the
> value in [26:23] on the next AUTOHALT transition. The duration of the A
> UTOHALT
> should be >=1ms to ensure the CPU's internal PLL is resynchronized. F
> or AUTOHALT, this means interrupts must be disabled except for the time ti
> ck, which should be reset to >=1ms. Care must be taken to avoid other sys
> tem events that could interfere with this operation. A few examples are 
> snooping, NMI, INIT, SMI and FLUSH."
>
> For CPU's with Longhaul MSR this time is equal to 200us.

That really is a rather horrible design on their part. Who the hell at 
VIA thought this was a good idea?

--
Robert Hancock      Saskatoon, SK, Canada
To email, remove "nospam" from hancockr@xxxxxxxxxxxxx
Home Page: http://www.roberthancock.com/

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