Re: [PATCH] All Transmeta CPUs have constant TSCs

From: Chris Friesen
Date: Mon Jan 08 2007 - 15:52:26 EST


Jan Engelhardt wrote:
On Jan 8 2007 00:02, dean gaudet wrote:

transmeta decided years before intel and amd that a constant rate tsc (unaffected by P-state) was the only sane choice. on transmeta cpus the tsc increments at the maximum cpu frequency no matter what the P-state (and no matter what longrun is doing behind the kernel's back).

Well it defeats the purpose of TSC. I mean, they could have kept the "TSC" and
instead added a second TSC ticker, constant_tsc.

Given that the name is "time stamp counter" then it makes sense to me to have a constant frequency.

For performance monitoring it would be useful to have a "cpu cycle counter" that counts clock cycles, and varies (and possibly stops) with the cpu itself.

Chris



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