Re: This kernel requires the following features not present on theCPU... (on a VIA C7 CPU)

From: Simon Arlott
Date: Thu May 17 2007 - 16:12:37 EST


On 17/05/07 13:27, Claas Langbehn wrote:
I have got a VIA EPIA EX15000G Mini-ITX mainboard with a C7 VIA Esther processor (1500MHz).
I have Jetway's J7F4K with the same CPU.

C7 CMPXCHG8 - enable/disable (Disable to install windows NT 4.0) and
C7 No Execute (NX) - enable/disable
Without those options in the BIOS setup.

> This kernel requires the following features not present on the CPU:
> 0:8
I attached a cpuinfo.txt. When the two flags are disabled, cx8 and nx are not listed there.
I don't have cx8, but I do have nx (which is unused because I have PAE disabled...).


On 17/05/07 19:33, H. Peter Anvin wrote:
Claas Langbehn wrote:
Would it be possible to override the BIOS settings of cx8 and nx and
> activate it with linux anyway?
> The CPU supports it and I don't see any reason to disable it.
>
Yes, that code is already in the git.newsetup tree.

Is it automatic? I have CONFIG_X86_CMPXCHG=y without cx8 showing in cpuinfo, and it appears to work fine.

Will your changes needlessly prevent the kernel running? Would I be right in thinking that the kernel is successfully using cmpxchg even though it's considered disabled? I realise people compile kernels for the wrong CPU but preventing them working when it's been chosen correctly seems wrong.

processor : 0
vendor_id : CentaurHauls
cpu family : 6
model : 10
model name : VIA Esther processor 1500MHz
stepping : 9
cpu MHz : 800.000 (cpufreq)
cache size : 128 KB
fdiv_bug : no
hlt_bug : no
f00f_bug : no
coma_bug : no
fpu : yes
fpu_exception : yes
cpuid level : 1
wp : yes
flags : fpu vme de pse tsc msr pae mce apic sep mtrr pge cmov pat clflush acpi mmx fxsr sse sse2 tm nx pni est tm2 rng rng_en ace ace_en ace2 ace2_en phe phe_en pmm pmm_en
bogomips : 1601.18
clflush size : 64

--
Simon Arlott

Attachment: config.gz
Description: GNU Zip compressed data