Re: [rfc][patch 2/3] x86: fix IO write barriers

[Dave Jones]

On Thu, Oct 04, 2007 at 08:21:59PM +0200, Andi Kleen wrote:
 > On Thursday 04 October 2007 20:10:44 Dave Jones wrote:
 > > On Thu, Oct 04, 2007 at 07:53:16PM +0200, Andi Kleen wrote:
 > >  > 
 > >  > > The only vendor that ever implemented OOSTOREs was Centaur, and they
 > >  > > only did in the Winchip generation of the CPUs.  When they dropped it
 > >  > > from the C3, I asked whether they intended to bring it back, and the
 > >  > > answer was "extremely unlikely".
 > >  > >
 > >  > 
 > >  > Do you know if it made a big performance difference?
 > > 
 > > On the winchip, it was a huge win. I can't remember exact numbers,
 > > but pretty much every benchmark I threw at it at the time showed
 > > significant improvement.
 > 
 > Significant as in >10%?

"Worth about 10-20% performance" according to the 2.4.18pre9-ac4
release notes: http://www.linuxtoday.com/news_story.php3?ltsn=2002-02-14-015-20-NW-KN

 > >  > But yes we should probably just remove this special case to make 
 > >  > maintenance easier.
 > > It's CONFIG_SMP anyway, which none of the winchips were.
 > 
 > It's not.

You're right it isn't now, but Nicks patch seems to change it so that it is.

...

 #ifdef CONFIG_SMP
 #define smp_mb()       mb()
 #define smp_rmb()      rmb()
-#define smp_wmb()      wmb()
+#ifdef CONFIG_X86_OOSTORE
+# define smp_wmb()     wmb()
+#else
+# define smp_wmb()     barrier()
+#endif

 > And we need memory barriers even without SMP 
 > when talking to device drivers. Only the smp_*b()s get noped
 > on UP.

Good point.

	Dave

-- 
http://www.codemonkey.org.uk
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