Re: x86_64 ten times slower than i386

[H. Peter Anvin]

Willy Tarreau wrote:
> On Mon, Nov 05, 2007 at 05:19:44PM -0800, H. Peter Anvin wrote:
> > Andi Kleen wrote:
> > > > Jesse Barnes (cc:d) wrote a patch to address this, I think (x86: trim
> > > > memory not covered by WB MTRRs), but as far as I can tell it hasn't
> > > > been merged yet. System is Intel, 4gb of RAM.
> > > It wasn't merged because it broke booting on some systems.
> > > Besides the memory would be still lost -- all it did was to automate
> > > the "mem=XXXX" line.
> > There really are only two ways to deal with this -- drop the memory 
> > (which should be automated, and a warning printed) or adjust the MTRRs. 
> >  The problem is that at some point we run out of MTRRs, partially 
> > because they're masks instead of base/limit.
>
> Just out of curiosity, what would be the problem if the MTRRs covered more
> than the memory size ? For instance, instead of having 512 MB at 4G, why
> not have 1G at 4G ?

That's fine, *as long as* you don't have any I/O devices there, 
including things like UMA graphics devices or memory areas used by SMM. 
 In theory, those should be marked reserved in e820.  In practice...

That's really the fundamental problem with the Intel MTRR design.  It 
works really well for banks of memory and really poorly as soon as 
something wants to "steal" memory or address space.

	-hpa
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