Re: SCSI breakage on non-cache coherent architectures

[Benjamin Herrenschmidt]

On Mon, 2007-11-19 at 00:38 -0800, David Miller wrote:
> From: Benjamin Herrenschmidt <benh@xxxxxxxxxxxxxxxxxxx>
> Date: Mon, 19 Nov 2007 16:35:23 +1100
> 
> > I'm not sure what is the best way to fix that. Internally, I've done
> > some test whacking some ____cacheline_aligned in the scsi_cmnd data
> > structure to verify I no longer get random SLAB corruption when using my
> > USB but that significantly bloats the size of the structure on archs
> > such as ppc64 that don't need it and have a large cache line size.
> > 
> > Unfortunately, I don't think there's any existing Kconfig symbol or arch
> > provided #define to tell us that we are on a non-coherent arch afaik
> > that could be used to make that conditional.
> > 
> > Another option would be to kmalloc the buffer (wasn't it the case before
> > btw ?) but I suppose some people will scream at the idea due to how the
> > command pools are done...
> 
> You could make a ____dma_cacheline_aligned and use that.
> It seems pretty reasonable.

I was thinking about that. What archs would need it ? arm, mips, what
else ?

Cheers,
Ben.

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