Re: [X86] Add recent Centaur CPUs to PAT whitelist
From: Dave Jones
Date: Thu May 22 2008 - 14:06:27 EST
On Thu, May 22, 2008 at 09:48:44AM -0700, H. Peter Anvin wrote:
> Dave Jones wrote:
> > On Wed, May 21, 2008 at 04:56:28PM -0700, H. Peter Anvin wrote:
> > > Dave Jones wrote:
> > > >
> > > > From conversation with Centaur engineers, both the newer generations
> > > > of the VIA C7, and their future CPUs support PAT, with no known errata.
> > > >
> > > > Signed-off-by: Dave Jones <davej@xxxxxxxxxx>
> > > >
> > >
> > > Question: are there any VIA CPUs that display the PAT CPUID flag that
> > > aren't covered by the above?
> > No. They only added PAT support with the current Esther (C7) generation iirc.
> OK, so we should just enable VIA unconditionally as long as PAT is
> displayed and not worry about generation numbers; same with Transmeta
> (only the Transmeta Efficeon supported PAT, and it had a
> strictly-coherent memory system.)
Unconditionally enable PAT support on Centaur and Transmeta CPUs.
All known models that advertise PAT have no known errata.
Signed-off-by: Dave Jones <davej@xxxxxxxxxx>
--- linux-2.6/arch/x86/kernel/cpu/addon_cpuid_features.c~ 2008-05-22 12:59:07.000000000 -0400
+++ linux-2.6/arch/x86/kernel/cpu/addon_cpuid_features.c 2008-05-22 12:59:36.000000000 -0400
@@ -62,6 +62,9 @@ void __cpuinit validate_pat_support(stru
if (c->x86 == 0xF || (c->x86 == 6 && c->x86_model >= 15))
+ case X86_VENDOR_CENTAUR:
+ case X86_VENDOR_TRANSMETA:
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