Re: [PATCH]: PCI: GART iommu alignment fixes [v2]

From: FUJITA Tomonori
Date: Sun Aug 17 2008 - 11:55:33 EST


On Mon, 18 Aug 2008 00:48:05 +0900
FUJITA Tomonori <fujita.tomonori@xxxxxxxxxxxxx> wrote:

> On Sun, 17 Aug 2008 17:42:13 +0200
> Ingo Molnar <mingo@xxxxxxx> wrote:
>
> >
> > * FUJITA Tomonori <fujita.tomonori@xxxxxxxxxxxxx> wrote:
> >
> > > The above commit log of Prarit's patch is completely wrong (so I wrote
> > > this patch). To avoid misunderstanding, can you apply this patch with
> > > a proper description like this:
> >
> > sure, i've created the commit below - is that fine?
> >
> > Ingo
>
> I think that 'v2' in the subject is unnecessary. The rest looks fine.
>
> Thanks,
>
>
> > --------------->
> > From 3f18931be15856db01a216995670412e4421f3c9 Mon Sep 17 00:00:00 2001
> > From: FUJITA Tomonori <fujita.tomonori@xxxxxxxxxxxxx>
> > Date: Mon, 18 Aug 2008 00:36:18 +0900
> > Subject: [PATCH] x86 gart: allocate size-aligned address for alloc_coherent, v2
> >
> > This patch changes GART IOMMU to return a size aligned address wrt
> > dma_alloc_coherent, as DMA-mapping.txt defines:
> >
> > The cpu return address and the DMA bus master address are both
> > guaranteed to be aligned to the smallest PAGE_SIZE order which
> > is greater than or equal to the requested size. This invariant
> > exists (for example) to guarantee that if you allocate a chunk
> > which is smaller than or equal to 64 kilobytes, the extent of the
> > buffer you receive will not cross a 64K boundary.

Ops, can you remove the following part? I confused
segment_boundary_mask with max_segment_size. A device needs to set
segment_boundary_mask properly if it doesn't want a buffer that
crosses a 64K boundary. We set the default boundary to 4G.


> > But it is very unlikely that this matters. As DMA-mapping.txt
> > explains, This invariant is to avoid the boundary problem (such as
> > 64K). Now the majority of IOMMUs including GART (except for Intel
> > IOMMU) don't allocate a buffer that crosses a 64K boundary wrt all the
> > DMA mapping interfaces (dma_alloc_coherent, dma_map_sg, and
> > dma_map_single) because of segment_boundary_mask in struct
> > device_dma_parameters.

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