Re: [PATCH] Initial support for Niagara T1 performance counters

[Elad Lahav]

David Miller wrote:
> Full support for both T1 and T2 performance counters (as well as those
> of all other sparc64 processors) is contained in the perfmon2 tree.
Fair enough, I wasn't aware that perfmon supported the T1.
Just for the record, is the implementation correct? Specifically, is 
this the right way to extract the PIL at the time of the trap?

Thanks,
Elad
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