Re: [PATCH] x86: c1e_idle: don't mark TSC unstable if CPU has invariant TSC

[Valdis . Kletnieks]

On Thu, 18 Sep 2008 21:12:10 +0200, Andreas Herrmann said:
> .. otherwise TSC is marked unstable on AMD family 0x10 and 0x11 CPUs.

OK.  I'll bite (admittedly not having looked at the actual code yet).

If the TSC is in fact invariant, what's causing the kernel to mark it as
unstable? Sounds almost like a bug being papered over here...

Attachment: pgp00000.pgp
Description: PGP signature