Re: [PATCH] pci: introduce users of ioremap_pcibar()

[Arjan van de Ven]

On Mon, 29 Sep 2008 01:26:43 -0600
Grant Grundler <grundler@xxxxxxxxxxxxxxxx> wrote:
> 
> Alternatively, the ioremap_pcibar() code needs to check for
> cacheable attribute and DTRT.

we should make it "if prefetchable, UC-, if not, hard UC", yes.

> > -	core->lmmio = ioremap(pci_resource_start(pci, 0),
> > -			      pci_resource_len(pci, 0));
> > +	core->lmmio = ioremap_pcibar(pci, 0);
> 
> Is there any easy way to tell if the device driver should be using
> uncached mappings vs cacheable mappings?
> (Just from looking at the source code)
> 
> This patch changes that behavior of the device driver so it uses
> uncacheable instead of cacheable mappings.  This is the only thing
> I'm uncertain about for this patch.

ioremap() also is uncachable today.


> 
> And I have a second issue less important issue.
> What is the result of ioremap_pcibar(pci, 1) when BAR0 is a 64-bit
> bar? Given the name, I expect to call "ioremap_pcibar(pci,2)" to get
> the desired result.  Maybe just document how to handle this correctly
> in Documentation/pci.txt would be sufficient.

we should detect this and DTRT inside the implementation, not in the
drivers.

-- 
Arjan van de Ven 	Intel Open Source Technology Centre
For development, discussion and tips for power savings, 
visit http://www.lesswatts.org
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/