Re: Toggling GPIO at 38Khz

[Andy Green]

Eric Miao wrote:

> This isn't easy, 38KHz is quite a high frequency, I'd prefer to
> use an interrupt or fiq based on a accurate clock event source,
> but that will have impact on the system anyway.

Many SoC can elevate PWM interrupt to FIQ.  It's definitely possible to
run a FIQ ISR at >50kHz on a slow system; you'd need 2 x the actual
modulation frequency on the PWM though in order to be able to put it on
and off in one cycle.

Then with the PWM regulating the clock rate, you will definitely get
consistent overall timing, and with FIQ service you will get very low
jitter on individual clock issue.  In the meanwhile the CPU will
continue servicing interrupts and running foreground code normally in
the cycles left inbetween FIQ service, so it is pretty friendly.

I have an implementation for sc32442 on Openmoko Freerunner kernel that
allows a FIQ ISR written in C, I wrote it to implement HDQ (1-bit
battery protocol that is time based) just using a GPIO and no hardware.
 I'm interested in making this more general for ARM to allow wider use
of FIQ stuff and try to get it upstream, but because FIQ itself has some
"special needs" I am not sure what changes are needed to make it more
palatable.

The main guts of it are here:

http://git.openmoko.org/?p=kernel.git;a=blob;f=arch/arm/mach-s3c2440/fiq_c_isr.h;h=e92b103cdfbf115947df5acb4312ef9fc39e1f6e;hb=andy-tracking
http://git.openmoko.org/?p=kernel.git;a=blob;f=arch/arm/mach-s3c2440/fiq_c_isr.c;h=c47d1630081f69dcb82a52a3db18765b10f35384;hb=andy-tracking

...and the FIQ ISR we use with those wrappers is here:

http://git.openmoko.org/?p=kernel.git;a=blob;f=arch/arm/mach-s3c2440/mach-gta02.c;h=cdf2a33b553157208457d1139307c83591d14704;hb=andy-tracking#l136

-Andy

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