Re: TSC unstable on Intel Pentium M processor 750

[Clark Williams]

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On Thu, 30 Apr 2009 15:40:02 +0800
"Mao Yilu" <ylmao@xxxxxxxxxxxxxxxx> wrote:

> > -----Original Message-----
> > From: linux-kernel-owner@xxxxxxxxxxxxxxx
> > [mailto:linux-kernel-owner@xxxxxxxxxxxxxxx] On Behalf Of Henrique de Moraes
> > Holschuh
> > Sent: Thursday, April 30, 2009 11:12 AM
> > To: Mao Yilu
> > Cc: 'Robert Hancock'; linux-kernel@xxxxxxxxxxxxxxx
> > Subject: Re: TSC unstable on Intel Pentium M processor 750
> > 
> > On Thu, 30 Apr 2009, Mao Yilu wrote:
> > > But I still don't know why the TSC is not correct in the C1 state (hlt
> > > instruction). Is there anything more to influence the TSC? What happened
> > > when the CPU is not running under hlt instruction?
> > 
> > SMIs?  Laptops love that crap...
> 
> What is SMIs?
> 
>

System Management Interrupt. Usually handled by BIOS code and
completely invisible to Linux. 

Laptops and big servers (rackmount/blades) typically have tons of SMIs
going off to do thermal management, statisics and remote management.

Clark
-----BEGIN PGP SIGNATURE-----
Version: GnuPG v2.0.10 (GNU/Linux)

iEYEARECAAYFAkn5tpkACgkQHyuj/+TTEp1CjgCfZkG+/AU9CJrTSrk/+XVqPszS
4aoAoNgvDoLRMRUs1VSXqBRyg2HzPs6U
=drzY
-----END PGP SIGNATURE-----
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