[PATCH 12/15 -tip] x86: Add cpufeature for MM configuration

[Jaswinder Singh Rajput]

X86_FEATURE_MM_CFG : MSRC001_0058 MMIO Configuration Base Address Register

Signed-off-by: Jaswinder Singh Rajput <jaswinderrajput@xxxxxxxxx>
---
 arch/x86/include/asm/cpufeature.h |    1 +
 arch/x86/kernel/cpu/amd.c         |    2 ++
 2 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
index e108284..101d8de 100644
--- a/arch/x86/include/asm/cpufeature.h
+++ b/arch/x86/include/asm/cpufeature.h
@@ -166,6 +166,7 @@
 #define X86_FEATURE_HW_CFG 	(7*32+ 11) /* Hardware configuration	*/
 #define X86_FEATURE_SYS_CFG 	(7*32+ 12) /* System configuration	*/
 #define X86_FEATURE_SMM 	(7*32+ 13) /* System Management	Mode	*/
+#define X86_FEATURE_MM_CFG 	(7*32+ 14) /* MM configuration		*/
 
 /* Virtualization flags: Linux defined */
 #define X86_FEATURE_TPR_SHADOW  (8*32+ 0) /* Intel TPR Shadow */
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c
index 88cac44..d068044 100644
--- a/arch/x86/kernel/cpu/amd.c
+++ b/arch/x86/kernel/cpu/amd.c
@@ -495,6 +495,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
 	if (c->x86 >= 0x10) {				/* fam10h+	*/
 		/* MSRC001_1022 Data Cache Configuration (DC_CFG)	*/
 		set_cpu_cap(c, X86_FEATURE_CACHE_CTL);
+		/* MSRC001_0058 MMIO Configuration Base Address Register*/
+		set_cpu_cap(c, X86_FEATURE_MM_CFG);
 	}
 }
 
-- 
1.6.0.6



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