Re: [VIA Support] was: [BUG FIX] Make x86_32 uni-processor Atomicops, Atomic

From: Harald Welte
Date: Wed May 27 2009 - 08:50:24 EST

On Wed, May 27, 2009 at 07:18:08AM -0500, Michael S. Zick wrote:
> On Sun May 24 2009, Harald Welte wrote:
> >
> > Once I understand it in full detail, I can talk to the right people inside
> > CentaurLabs (VIA's CPU division).
> >
> > If somebody (optionally) can phrase a precise technical question that I can
> > directly forward to somebody with low-level x86 knowledge but no Linux background,
> > it would definitely help speeding up the process.
> >
> What is the PCI Cache Line size in the CX700? In the CN896?

The chipset documentation doesn't say anything about that, I'd have to inquire
inside VIA. I doubt any difference between CX700/CN896.

Also, setting the PCI config space register to a too small cache line size
(such as 32) on a system that supports more (say 64) doesn't really cause any
problems, but just reduces performance - as far as I know.

Setting it too big will cause trouble. But since 32 is the default and
only on AMD and Intel CPU's it is increased, I see no issue here either.

- Harald Welte <HaraldWelte@xxxxxxxxxxx>
VIA Free and Open Source Software Liaison
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