[PATCH v2 0/10] Moorestown enabling x86 patches

From: Pan, Jacob jun
Date: Thu Jul 16 2009 - 06:54:36 EST


This patchset enables Moorestown platform in booting, system timers, and
interrupt controller support.

Moorestown is Intel's Mobile Internet Device (MID) platform for 2009. It
features Lincroft (north complex with CPU, memory controller, graphics unit) and Langwell (IO hub, system controller unit, etc.). While maintaining compatibility in the x86 core, it does not have many standard x86 PC features. Features related to this patchset are:
Features x86pc moorestown
---------------------------------------------------------------------------
Interrupt controller i8259/PIC IOAPIC only w/o legacy route
System timers i8254 HPET APB timers, up to 8
FW BIOS simple boot FW, no runtime
I/O ports yes Lincroft only
---------------------------------------------------------------------------

Highlights of what I have changed since the previous submission:

[PATCH 1/9] x86/boot: add setup_secondary_clock to x86 quirk
none

[PATCH 2/9] x86: introduce a set of platform feature flags
Use __set_bit,
Use void for platform_feature_init_default(void)
Assign default platform flags and x86 quirk based on sub arch ids

[PATCH 3/9] x86/moorestown: add moorestown platform flags
Combined in previous patch

[PATCH 4/9] x86/boot: adding hw subarch ID for Moorestown
Use enum

[PATCH 5/9] x86: make use of platform flags in setup code
Added quirk for reserve_ebda_region()
Moved down platform feature check to probe_rom
Added x86 PCI irq change, was in Jesse's MRST PCI patch

[PATCH 6/9] x86: add moorestown specific setup code
Removed mrst_early_detect()
Add PCI SHIM feature to default MRST flags

[PATCH 7/9] x86/apbt: Moorestown APB system timer driver
Split into three patches, timer driver, tsc, choose timer
Misc clean up

[PATCH 8/9] x86/apic: match destination id with destination mode
Dropped

[PATCH 9/9] x86/apic: support moorestown interrupt subsystem
Split into two patches, decouple i8259 and ioapic,


Jacob Pan
Linux Software Engineer
Intel Open Source Technology Center

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