Re: [PATCH 1/1] PCI: Handle case when no pci device can provide cacheline size hint

[Tejun Heo]

Hello,

On 12/15/2009 09:25 PM, Csaba Henk wrote:
> Prior to this patch, if pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, ...)
> returns 0 for all dev, pci_cache_line_size ends up set to zero
> (instead of pci_dfl_cache_line_size).
> 
> This patch ensures the pci_cache_line_size = pci_dfl_cache_line_size
> setting in the above scenario.
> 
> This happens in case of a kvm-88 guest (where, consequently, the rtl8139
> NIC failed to initialize).
> 
> Signed-off-by: Csaba Henk <csaba@xxxxxxxxxxx>
> ---
>  drivers/pci/quirks.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
> index 7cfa7c3..f70f4e2 100644
> --- a/drivers/pci/quirks.c
> +++ b/drivers/pci/quirks.c
> @@ -2629,7 +2629,7 @@ static int __init pci_apply_final_quirks(void)
>  	if (!pci_cache_line_size) {
>  		printk(KERN_DEBUG "PCI: CLS %u bytes, default %u\n",
>  		       cls << 2, pci_dfl_cache_line_size << 2);
> -		pci_cache_line_size = cls;
> +		pci_cache_line_size = cls ? cls : pci_dfl_cache_line_size;

Oh, so, all CLS values are zero?  I've never thought of that.

Acked-by: Tejun Heo <tj@xxxxxxxxxx>

Thanks.

-- 
tejun
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