On Mon, 2010-01-18 at 14:37 +0200, Avi Kivity wrote:
On 01/18/2010 02:14 PM, Peter Zijlstra wrote:So setting RPL to 3 on the user segments allows access to kernel pages
CPL2 gives unrestricted access to the kernel address space; and RPL doesWell, the alternatives are very unappealing. Emulation andWith CPL2 or RPL on user segments the protection issue seems to be
single-stepping are going to be very slow compared to a couple of jumps.
manageable for running the instructions from kernel space.
not affect page level protection. Segment limits don't work on x86-64.
But perhaps I missed something - these things are tricky.
just fine? How useful.. :/
It should be possible to translate the instruction into an address spaceWell, if you manage to do the address validation you don't need the priv
check, followed by the action, but that's still slower due to privilege
level switch anymore, right?
Are the ins encodings sane enough to recognize mem parameters without
needing to know the actual ins?
How about using a hw-breakpoint to close the gap for the inline single
step? You could even re-insert the int3 lazily when you need the
hw-breakpoint again. It would consume one hw-breakpoint register for
each task/cpu that has probes though..