Re: USB mass storage and ARM cache coherency
From: Oliver Neukum
Date: Fri Jan 29 2010 - 11:41:10 EST
Am Freitag, 29. Januar 2010 17:34:03 schrieb Catalin Marinas:
> I was thinking about checking dev->bus->controller->dma_mask which the
> code (though not the storage one) seems to imply that if the dma_mask is
> 0, the HCD driver is only capable of PIO.
That a HCD is capable of DMA need not imply that DMA is used for every
> That would be a more general solution rather than going through each HCD
> driver since my understanding is that flush_dcache_page() is only needed
> together with the mass storage support.
What about ub, nfs or nbd over a USB<->ethernet converter?
This, I am afraid is best solved at the HCD or glue layer.
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