[PATCH 2/2] AT91 slow-clock resume: don't restore the PLL settingswhen the PLL was off

From: Anders Larsen
Date: Wed Mar 03 2010 - 17:03:18 EST

From: Julien Langer <julien.langer@xxxxxxxxx>

AT91: Don't try to restore the PLL settings on resume when the PLLs were turned
off before suspending.

We run into this problem with the PLLB on the at91: ohci-at91 disables the PLLB
when going to suspend. The slowclock code however tries to do the same: It
saves the PLLB register value and when restoring the value during resume it
waits for the PLLB to lock again. However the PLL will never lock and the loop
would run into its timeout because the slowclock code just stored and restored
an empty register.
Fix the problem by only restoring PLLA/PLLB when the registers were != 0.

Signed-off-by: Julien Langer <julien.langer@xxxxxxxxx>
Signed-off-by: Anders Larsen <al@xxxxxxxxxxx>
Cc: Andrew Victor <avictor.za@xxxxxxxxx>
Cc: Russell King <linux@xxxxxxxxxxxxxxxx>
arch/arm/mach-at91/pm_slowclock.S | 14 ++++++++++++++
1 file changed, 14 insertions(+)

Index: b/arch/arm/mach-at91/pm_slowclock.S
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -171,17 +171,25 @@ ENTRY(at91_slow_clock)
ldr r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]
str r3, .saved_pllar

+ cmp r3, #0
+ beq 3f
mov r3, #AT91_PMC_PLLCOUNT
orr r3, r3, #(1 << 29) /* bit 29 always set */
str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]

/* Save PLLB setting and disable it */
ldr r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]
str r3, .saved_pllbr

+ cmp r3, #0
+ beq 4f
mov r3, #AT91_PMC_PLLCOUNT
str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]

/* Turn off the main oscillator */
ldr r3, [r1, #(AT91_CKGR_MOR - AT91_PMC)]
bic r3, r3, #AT91_PMC_MOSCEN
@@ -199,16 +207,22 @@ ENTRY(at91_slow_clock)

/* Restore PLLB setting */
ldr r3, .saved_pllbr
+ cmp r3, #0
+ beq 5f
str r3, [r1, #(AT91_CKGR_PLLBR - AT91_PMC)]


/* Restore PLLA setting */
ldr r3, .saved_pllar
+ cmp r3, #0
+ beq 6f
str r3, [r1, #(AT91_CKGR_PLLAR - AT91_PMC)]


* First set PRES if it was not 0,
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