Re: [RFC][PATCH 08/11] perf, x86: Implement simple LBR support

From: Stephane Eranian
Date: Thu Mar 04 2010 - 15:58:06 EST

On Thu, Mar 4, 2010 at 12:23 PM, Peter Zijlstra <peterz@xxxxxxxxxxxxx> wrote:
> On Thu, 2010-03-04 at 19:18 +0100, Peter Zijlstra wrote:
>> What is currently implemented is that we loose history at the point a
>> new task schedules in an LBR using event.
> This also matches CPU errata AX14, AJ52 and AAK109 which states that a
> task switch may produce faulty LBR state, so clearing history after a
> task switch seems the best thing to do.
You would save the LBR before the task switch and restore after the
task switch, so I don't see how you would be impacted by this. You
would not pick up the bogus LBR content.

Given that you seem to be interested only in LBR at the user level.
I think what you have right now should work. But I don't like a design
that precludes supporting LBR config regardless of the fact the MSR
is shared or not, because that is preventing some interesting
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