An even more accurate way to determine this is to check whether theYes. But the frame pointer checking seems a little complicated.
interrupt frame points back at the 'int $2' instruction. However we
plan to switch to a self-IPI method to inject the NMI, and I'm not sure
wether APIC NMIs are accepted on an instruction boundary or whether
there's some latency involved.
Right. The kernel part has dependency on the self-IPI implementation.trace_kvm_entry(vcpu->vcpu_id);If you move this around the 'int $2' instructions you will close the
+
+ percpu_write(current_vcpu, vcpu);
kvm_x86_ops->run(vcpu);
+ percpu_write(current_vcpu, NULL);
race, as a stray NMI won't catch us updating the rip cache. But that
depends on whether self-IPI is accepted on the next instruction or not.
I will move above percpu_write(current_vcpu, vcpu) (or a new wrapper function)
just around 'int $2'.
Sheng would find a solution on the self-IPI delivery. Let's separate my patch
and self-IPI as 2 issues as we don't know when the self-IPI delivery would be
resolved.