Re: [PATCH] Handle instruction cache maintenance fault properly

[Catalin Marinas]

On Mon, 2010-05-10 at 15:52 +0100, Valdis.Kletnieks@xxxxxx wrote:
> On Mon, 10 May 2010 16:34:57 +0300, "Kirill A. Shutemov" said:
> 
> > It looks like cache maintenance fault was introduced in ARMv6.
> > 
> > So, what is the right way to fix it? Something like:
> > 
> > #if __LINUX_ARM_ARCH__ < 6
> >         { do_bad,               SIGBUS,  0,             "external
> 
> This would need to be a runtime test, no?  Or does LINUX_ARM_ARCH not allow
> it to run on other arch levels? (i.e. can an ARM kernel boot for v5 and v6?)

v6 and v7 probably but I doubt v5 and v6 would work. There are other
#ifdefs in arch/arm/include/asm/system.h like barriers.

-- 
Catalin

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