Re: [rtc-linux] [PATCH] rtc: driver for the DryIce block found in i.MX25 chips

From: Wan ZongShun
Date: Sun Jun 06 2010 - 11:37:18 EST


Baruch,

Forgetting to point one issue below:


2010/6/5 Wan ZongShun <mcuos.com@xxxxxxxxx>:
> Hi Baruch ,
>
> Some minor comments below:
>
> 2010/6/2 Baruch Siach <baruch@xxxxxxxxxx>:
>> This driver is based on code from Freescale which accompanies their i.MX25 PDK
>> board, with some cleanup.
>>
>> Signed-off-by: Baruch Siach <baruch@xxxxxxxxxx>
>> Cc: Alessandro Zummo <a.zummo@xxxxxxxxxxxx>
>> ---
>>
>> I'm sending this to LKML also, since the RTC maintainer has been silent since I
>> sent v3 of this driver three months ago. If you know any better way to push
>> this driver upstream, please let me know.
>>
>> Changes v3 -> v4:
>>
>> Â Â Â ÂMerge in a patch fixing an "irq: nobody cared" race.
>>
>> Changes v2 -> v3:
>>
>> Add spaces around the '+' operator as suggested by Alessandro Zummo and Lothar
>> WaÃmann.
>>
>> Address other comments of Alessandro Zummo:
>>
>> Â Â Â Â* add implementation of the alarm_irq_enable rtc op
>> Â Â Â Â* use devres in .probe
>> Â Â Â Â* remove unneeded initializations
>>
>> Changes v1 -> v2:
>>
>> Address the comments of Alessandro Zummo:
>>
>> Â Â Â Â* remove the .ioctl implementation
>> Â Â Â Â* implement .set_mmss instead of .set_time
>> Â Â Â Â* reorder the .probe implementation
>> Â Â Â Â* make sure not to have enabled interrupts when registering or
>> Â Â Â Â Âunregistering the rtc device
>> Â Â Â Â* add MODULE_AUTHOR() with my email
>>
>> Address the comment of Lothar WaÃmann:
>>
>> Â Â Â Â* return PTR_ERR on clk_get failure
>>
>> Slightly change MODULE_DESCRIPTION().
>> Use timeout which is independent of HZ for wait_event_interruptible_timeout().
>>
>> Âdrivers/rtc/Kconfig   |  10 +
>> Âdrivers/rtc/Makefile  Â|  Â1 +
>> Âdrivers/rtc/rtc-imxdi.c | Â520 +++++++++++++++++++++++++++++++++++++++++++++++
>> Â3 files changed, 531 insertions(+), 0 deletions(-)
>> Âcreate mode 100644 drivers/rtc/rtc-imxdi.c
>>
>> diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
>> index 10ba12c..f7dab3b 100644
>> --- a/drivers/rtc/Kconfig
>> +++ b/drivers/rtc/Kconfig
>> @@ -537,6 +537,16 @@ config RTC_DRV_MSM6242
>> Â Â Â Â ÂThis driver can also be built as a module. If so, the module
>> Â Â Â Â Âwill be called rtc-msm6242.
>>
>> +config RTC_DRV_IMXDI
>> + Â Â Â tristate "Freescale IMX DryIce Real Time Clock"
>> + Â Â Â depends on ARCH_MX25
>> + Â Â Â depends on RTC_CLASS
>> + Â Â Â help
>> + Â Â Â Â ÂSupport for Freescale IMX DryIce RTC
>> +
>> + Â Â Â Â ÂThis driver can also be built as a module, if so, the module
>> + Â Â Â Â Âwill be called "rtc-imxdi".
>> +
>> Âconfig RTC_MXC
>> Â Â Â Âtristate "Freescale MXC Real Time Clock"
>> Â Â Â Âdepends on ARCH_MXC
>> diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
>> index 5adbba7..e0f6fd5 100644
>> --- a/drivers/rtc/Makefile
>> +++ b/drivers/rtc/Makefile
>> @@ -46,6 +46,7 @@ obj-$(CONFIG_RTC_DRV_EFI) Â Â += rtc-efi.o
>> Âobj-$(CONFIG_RTC_DRV_EP93XX) Â += rtc-ep93xx.o
>> Âobj-$(CONFIG_RTC_DRV_FM3130) Â += rtc-fm3130.o
>> Âobj-$(CONFIG_RTC_DRV_GENERIC) Â+= rtc-generic.o
>> +obj-$(CONFIG_RTC_DRV_IMXDI) Â Â+= rtc-imxdi.o
>> Âobj-$(CONFIG_RTC_DRV_ISL1208) Â+= rtc-isl1208.o
>> Âobj-$(CONFIG_RTC_DRV_M41T80) Â += rtc-m41t80.o
>> Âobj-$(CONFIG_RTC_DRV_M41T94) Â += rtc-m41t94.o
>> diff --git a/drivers/rtc/rtc-imxdi.c b/drivers/rtc/rtc-imxdi.c
>> new file mode 100644
>> index 0000000..7f207cd
>> --- /dev/null
>> +++ b/drivers/rtc/rtc-imxdi.c
>> @@ -0,0 +1,520 @@
>> +/*
>> + * Copyright 2008-2009 Freescale Semiconductor, Inc. All Rights Reserved.
>> + * Copyright 2010 Orex Computed Radiography
>> + */
>> +
>> +/*
>> + * The code contained herein is licensed under the GNU General Public
>> + * License. You may obtain a copy of the GNU General Public License
>> + * Version 2 or later at the following locations:
>> + *
>> + * http://www.opensource.org/licenses/gpl-license.html
>> + * http://www.gnu.org/copyleft/gpl.html
>> + */
>> +
>> +/* based on rtc-mc13892.c */
>> +
>> +/*
>> + * This driver uses the 47-bit 32 kHz counter in the Freescale DryIce block
>> + * to implement a Linux RTC. Times and alarms are truncated to seconds.
>> + * Since the RTC framework performs API locking via rtc->ops_lock the
>> + * only simultaneous accesses we need to deal with is updating DryIce
>> + * registers while servicing an alarm.
>> + *
>> + * Note that reading the DSR (DryIce Status Register) automatically clears
>> + * the WCF (Write Complete Flag). All DryIce writes are synchronized to the
>> + * LP (Low Power) domain and set the WCF upon completion. Writes to the
>> + * DIER (DryIce Interrupt Enable Register) are the only exception. These
>> + * occur at normal bus speeds and do not set WCF. ÂPeriodic interrupts are
>> + * not supported by the hardware.
>> + */
>> +
>> +#include <linux/io.h>
>> +#include <linux/clk.h>
>> +#include <linux/delay.h>
>> +#include <linux/module.h>
>> +#include <linux/platform_device.h>
>> +#include <linux/rtc.h>
>> +#include <linux/workqueue.h>
>> +
>> +/* DryIce Register Definitions */
>> +
>> +#define DTCMR Â Â 0x00 Â Â Â Â Â /* Time Counter MSB Reg */
>> +#define DTCLR Â Â 0x04 Â Â Â Â Â /* Time Counter LSB Reg */
>> +
>> +#define DCAMR Â Â 0x08 Â Â Â Â Â /* Clock Alarm MSB Reg */
>> +#define DCALR   0x0c      /* Clock Alarm LSB Reg */
>> +#define DCAMR_UNSET Â0xFFFFFFFF Â/* doomsday - 1 sec */
>> +
>> +#define DCR Â Â Â 0x10 Â Â Â Â Â /* Control Reg */
>> +#define DCR_TCE Â (1 << 3) Â Â Â /* Time Counter Enable */
>> +
>> +#define DSR Â Â Â 0x14 Â Â Â Â Â /* Status Reg */
>> +#define DSR_WBF Â (1 << 10) Â Â Â/* Write Busy Flag */
>> +#define DSR_WNF Â (1 << 9) Â Â Â /* Write Next Flag */
>> +#define DSR_WCF Â (1 << 8) Â Â Â /* Write Complete Flag */
>> +#define DSR_WEF Â (1 << 7) Â Â Â /* Write Error Flag */
>> +#define DSR_CAF Â (1 << 4) Â Â Â /* Clock Alarm Flag */
>> +#define DSR_NVF Â (1 << 1) Â Â Â /* Non-Valid Flag */
>> +#define DSR_SVF Â (1 << 0) Â Â Â /* Security Violation Flag */
>> +
>> +#define DIER Â Â Â0x18 Â Â Â Â Â /* Interrupt Enable Reg */
>> +#define DIER_WNIE (1 << 9) Â Â Â /* Write Next Interrupt Enable */
>> +#define DIER_WCIE (1 << 8) Â Â Â /* Write Complete Interrupt Enable */
>> +#define DIER_WEIE (1 << 7) Â Â Â /* Write Error Interrupt Enable */
>> +#define DIER_CAIE (1 << 4) Â Â Â /* Clock Alarm Interrupt Enable */
>> +
>> +/**
>> + * struct imxdi_dev - private imxdi rtc data
>> + * @pdev: pionter to platform dev
>> + * @rtc: pointer to rtc struct
>> + * @ioaddr: IO registers pointer
>> + * @irq: dryice normal interrupt
>> + * @clk: input reference clock
>> + * @dsr: copy of the DSR register
>> + * @irq_lock: interrupt enable register (DIER) lock
>> + * @write_wait: registers write complete queue
>> + * @write_mutex: serialize registers write
>> + * @work: schedule alarm work
>> + */
>> +struct imxdi_dev {
>> + Â Â Â struct platform_device *pdev;
>> + Â Â Â struct rtc_device *rtc;
>> + Â Â Â void __iomem *ioaddr;
>> + Â Â Â int irq;
>> + Â Â Â struct clk *clk;
>> + Â Â Â u32 dsr;
>> + Â Â Â spinlock_t irq_lock;
>> + Â Â Â wait_queue_head_t write_wait;
>> + Â Â Â struct mutex write_mutex;
>> + Â Â Â struct work_struct work;
>> +};
>> +
>> +/*
>> + * enable a dryice interrupt
>> + */
>> +static inline void di_int_enable(struct imxdi_dev *imxdi, u32 intr)
>> +{
>> + Â Â Â unsigned long flags;
>> +
>> + Â Â Â spin_lock_irqsave(&imxdi->irq_lock, flags);
>> + Â Â Â __raw_writel(__raw_readl(imxdi->ioaddr + DIER) | intr,
>> + Â Â Â Â Â Â Â Â Â Â Â imxdi->ioaddr + DIER);
>> + Â Â Â spin_unlock_irqrestore(&imxdi->irq_lock, flags);
>> +}
>> +
>> +/*
>> + * disable a dryice interrupt
>> + */
>> +static inline void di_int_disable(struct imxdi_dev *imxdi, u32 intr)
>> +{
>> + Â Â Â unsigned long flags;
>> +
>> + Â Â Â spin_lock_irqsave(&imxdi->irq_lock, flags);
>> + Â Â Â __raw_writel(__raw_readl(imxdi->ioaddr + DIER) & ~intr,
>> + Â Â Â Â Â Â Â Â Â Â Â imxdi->ioaddr + DIER);
>> + Â Â Â spin_unlock_irqrestore(&imxdi->irq_lock, flags);
>> +}
>> +
>> +/*
>> + * This function attempts to clear the dryice write-error flag.
>> + *
>> + * A dryice write error is similar to a bus fault and should not occur in
>> + * normal operation. ÂClearing the flag requires another write, so the root
>> + * cause of the problem may need to be fixed before the flag can be cleared.
>> + */
>> +static void clear_write_error(struct imxdi_dev *imxdi)
>> +{
>> + Â Â Â int cnt;
>> +
>> + Â Â Â dev_warn(&imxdi->pdev->dev, "WARNING: Register write error!\n");
>> +
>> + Â Â Â for (;;) {
>> + Â Â Â Â Â Â Â /* clear the write error flag */
>> + Â Â Â Â Â Â Â __raw_writel(DSR_WEF, imxdi->ioaddr + DSR);
>> +
>> + Â Â Â Â Â Â Â /* wait for it to take effect */
>> + Â Â Â Â Â Â Â for (cnt = 0; cnt < 100; cnt++) {
>> + Â Â Â Â Â Â Â Â Â Â Â if ((__raw_readl(imxdi->ioaddr + DSR) & DSR_WEF) == 0)
>> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â return;
>> + Â Â Â Â Â Â Â Â Â Â Â udelay(10);
>> + Â Â Â Â Â Â Â }
>> + Â Â Â Â Â Â Â dev_err(&imxdi->pdev->dev,
>> + Â Â Â Â Â Â Â Â Â Â Â "ERROR: Cannot clear write-error flag!\n");
>> + Â Â Â }
>> +}
>> +
>> +/*
>> + * Write a dryice register and wait until it completes.
>> + *
>> + * This function uses interrupts to determine when the
>> + * write has completed.
>> + */
>> +static int di_write_wait(struct imxdi_dev *imxdi, u32 val, int reg)
>> +{
>> + Â Â Â int ret;
>> + Â Â Â int rc = 0;
>> +
>> + Â Â Â /* serialize register writes */
>> + Â Â Â mutex_lock(&imxdi->write_mutex);
>> +
>> + Â Â Â /* enable the write-complete interrupt */
>> + Â Â Â di_int_enable(imxdi, DIER_WCIE);
>> +
>> + Â Â Â imxdi->dsr = 0;
>> +
>> + Â Â Â /* do the register write */
>> + Â Â Â __raw_writel(val, imxdi->ioaddr + reg);
>> +
>> + Â Â Â /* wait for the write to finish */
>> + Â Â Â ret = wait_event_interruptible_timeout(imxdi->write_wait,
>> + Â Â Â Â Â Â Â Â Â Â Â imxdi->dsr & (DSR_WCF | DSR_WEF), msecs_to_jiffies(1));
>> + Â Â Â if (ret == 0)
>> + Â Â Â Â Â Â Â dev_warn(&imxdi->pdev->dev,
>> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â "Write-wait timeout "
>> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â "val = 0x%08x reg = 0x%08x\n", val, reg);
>> +
>> + Â Â Â /* check for write error */
>> + Â Â Â if (imxdi->dsr & DSR_WEF) {
>> + Â Â Â Â Â Â Â clear_write_error(imxdi);
>> + Â Â Â Â Â Â Â rc = -EIO;
>> + Â Â Â }
>> + Â Â Â mutex_unlock(&imxdi->write_mutex);
>> + Â Â Â return rc;
>> +}
>> +
>> +/*
>> + * read the seconds portion of the current time from the dryice time counter
>> + */
>> +static int dryice_rtc_read_time(struct device *dev, struct rtc_time *tm)
>> +{
>> + Â Â Â struct imxdi_dev *imxdi = dev_get_drvdata(dev);
>> + Â Â Â unsigned long now;
>> +
>> + Â Â Â now = __raw_readl(imxdi->ioaddr + DTCMR);
>> + Â Â Â rtc_time_to_tm(now, tm);
>> +
>
> When we want to return a tm value, call rtc_valid_tm() to check the tm
> that is a good habit.
>
>> + Â Â Â return 0;
>> +}
>> +
>> +/*
>> + * set the seconds portion of dryice time counter and clear the
>> + * fractional part.
>> + */
>> +static int dryice_rtc_set_mmss(struct device *dev, unsigned long secs)
>> +{
>> + Â Â Â struct imxdi_dev *imxdi = dev_get_drvdata(dev);
>> + Â Â Â int rc;
>> +
>> + Â Â Â /* zero the fractional part first */
>> + Â Â Â rc = di_write_wait(imxdi, 0, DTCLR);
>> + Â Â Â if (rc == 0)
>> + Â Â Â Â Â Â Â rc = di_write_wait(imxdi, secs, DTCMR);
>> +
>> + Â Â Â return rc;
>> +}
>> +
>> +static int dryice_rtc_alarm_irq_enable(struct device *dev,
>> + Â Â Â Â Â Â Â unsigned int enabled)
>> +{
>> + Â Â Â struct imxdi_dev *imxdi = dev_get_drvdata(dev);
>> +
>> + Â Â Â if (enabled)
>> + Â Â Â Â Â Â Â di_int_enable(imxdi, DIER_CAIE);
>> + Â Â Â else
>> + Â Â Â Â Â Â Â di_int_disable(imxdi, DIER_CAIE);
>> +
>> + Â Â Â return 0;
>> +}
>> +
>> +/*
>> + * read the seconds portion of the alarm register.
>> + * the fractional part of the alarm register is always zero.
>> + */
>> +static int dryice_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
>> +{
>> + Â Â Â struct imxdi_dev *imxdi = dev_get_drvdata(dev);
>> + Â Â Â u32 dcamr;
>> +
>> + Â Â Â dcamr = __raw_readl(imxdi->ioaddr + DCAMR);
>> + Â Â Â rtc_time_to_tm(dcamr, &alarm->time);
>> +
>> + Â Â Â /* alarm is enabled if the interrupt is enabled */
>> + Â Â Â alarm->enabled = (__raw_readl(imxdi->ioaddr + DIER) & DIER_CAIE) != 0;
>> +
>> + Â Â Â /* don't allow the DSR read to mess up DSR_WCF */
>> + Â Â Â mutex_lock(&imxdi->write_mutex);
>> +
>> + Â Â Â /* alarm is pending if the alarm flag is set */
>> + Â Â Â alarm->pending = (__raw_readl(imxdi->ioaddr + DSR) & DSR_CAF) != 0;
>> +
>> + Â Â Â mutex_unlock(&imxdi->write_mutex);
>> +
>> + Â Â Â return 0;
>> +}
>> +
>> +/*
>> + * set the seconds portion of dryice alarm register
>> + */
>> +static int dryice_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
>> +{
>> + Â Â Â struct imxdi_dev *imxdi = dev_get_drvdata(dev);
>> + Â Â Â unsigned long now;
>> + Â Â Â unsigned long alarm_time;
>> + Â Â Â int rc;
>> +
>> + Â Â Â rc = rtc_tm_to_time(&alarm->time, &alarm_time);
>> + Â Â Â if (rc)
>> + Â Â Â Â Â Â Â return rc;
>> +
>> + Â Â Â /* don't allow setting alarm in the past */
>> + Â Â Â now = __raw_readl(imxdi->ioaddr + DTCMR);
>> + Â Â Â if (alarm_time < now)
>> + Â Â Â Â Â Â Â return -EINVAL;
>> +
>> + Â Â Â /* write the new alarm time */
>> + Â Â Â rc = di_write_wait(imxdi, (u32)alarm_time, DCAMR);
>> + Â Â Â if (rc)
>> + Â Â Â Â Â Â Â return rc;
>> +
>> + Â Â Â if (alarm->enabled)
>> + Â Â Â Â Â Â Â di_int_enable(imxdi, DIER_CAIE); Â/* enable alarm intr */
>> + Â Â Â else
>> + Â Â Â Â Â Â Â di_int_disable(imxdi, DIER_CAIE); /* disable alarm intr */
>> +
>> + Â Â Â return 0;
>> +}
>> +
>> +static struct rtc_class_ops dryice_rtc_ops = {
>> +    .read_time       Â= dryice_rtc_read_time,
>> +    .set_mmss        = dryice_rtc_set_mmss,
>> +    .alarm_irq_enable    = dryice_rtc_alarm_irq_enable,
>> +    .read_alarm       = dryice_rtc_read_alarm,
>> +    .set_alarm       Â= dryice_rtc_set_alarm,
>> +};
>> +
>> +/*
>> + * dryice "normal" interrupt handler
>> + */
>> +static irqreturn_t dryice_norm_irq(int irq, void *dev_id)
>> +{
>> + Â Â Â struct imxdi_dev *imxdi = dev_id;
>> + Â Â Â u32 dsr, dier;
>> + Â Â Â irqreturn_t rc = IRQ_NONE;
>> +
>> + Â Â Â dier = __raw_readl(imxdi->ioaddr + DIER);
>> +
>> + Â Â Â /* handle write complete and write error cases */
>> + Â Â Â if ((dier & DIER_WCIE)) {
>> + Â Â Â Â Â Â Â /*If the write wait queue is empty then there is no pending
>> + Â Â Â Â Â Â Â Â operations. It means the interrupt is for DryIce -Security.
>> + Â Â Â Â Â Â Â Â IRQ must be returned as none.*/
>> + Â Â Â Â Â Â Â if (list_empty_careful(&imxdi->write_wait.task_list))
>> + Â Â Â Â Â Â Â Â Â Â Â return rc;
>> +
>> + Â Â Â Â Â Â Â /* DSR_WCF clears itself on DSR read */
>> + Â Â Â Â Â Â Â dsr = __raw_readl(imxdi->ioaddr + DSR);
>> + Â Â Â Â Â Â Â if ((dsr & (DSR_WCF | DSR_WEF))) {
>> + Â Â Â Â Â Â Â Â Â Â Â /* mask the interrupt */
>> + Â Â Â Â Â Â Â Â Â Â Â di_int_disable(imxdi, DIER_WCIE);
>> +
>> + Â Â Â Â Â Â Â Â Â Â Â /* save the dsr value for the wait queue */
>> + Â Â Â Â Â Â Â Â Â Â Â imxdi->dsr |= dsr;
>> +
>> + Â Â Â Â Â Â Â Â Â Â Â wake_up_interruptible(&imxdi->write_wait);
>> + Â Â Â Â Â Â Â Â Â Â Â rc = IRQ_HANDLED;
>> + Â Â Â Â Â Â Â }
>> + Â Â Â }
>> +
>> + Â Â Â /* handle the alarm case */
>> + Â Â Â if ((dier & DIER_CAIE)) {
>> + Â Â Â Â Â Â Â /* DSR_WCF clears itself on DSR read */
>> + Â Â Â Â Â Â Â dsr = __raw_readl(imxdi->ioaddr + DSR);
>> + Â Â Â Â Â Â Â if (dsr & DSR_CAF) {
>> + Â Â Â Â Â Â Â Â Â Â Â /* mask the interrupt */
>> + Â Â Â Â Â Â Â Â Â Â Â di_int_disable(imxdi, DIER_CAIE);
>> +
>> + Â Â Â Â Â Â Â Â Â Â Â /* finish alarm in user context */
>> + Â Â Â Â Â Â Â Â Â Â Â schedule_work(&imxdi->work);
>> + Â Â Â Â Â Â Â Â Â Â Â rc = IRQ_HANDLED;
>> + Â Â Â Â Â Â Â }
>> + Â Â Â }
>> + Â Â Â return rc;
>> +}
>> +
>> +/*
>> + * post the alarm event from user context so it can sleep
>> + * on the write completion.
>> + */
>> +static void dryice_work(struct work_struct *work)
>> +{
>> + Â Â Â struct imxdi_dev *imxdi = container_of(work,
>> + Â Â Â Â Â Â Â Â Â Â Â struct imxdi_dev, work);
>> +
>> + Â Â Â /* dismiss the interrupt (ignore error) */
>> + Â Â Â di_write_wait(imxdi, DSR_CAF, DSR);
>> +
>> + Â Â Â /*
>> + Â Â Â Â* pass the alarm event to the rtc framework. note that
>> + Â Â Â Â* rtc_update_irq expects to be called with interrupts off.
>> + Â Â Â Â*/
>> + Â Â Â local_irq_disable();
>> + Â Â Â rtc_update_irq(imxdi->rtc, 1, RTC_AF | RTC_IRQF);
>> + Â Â Â local_irq_enable();
>
> Are local_irq_disable() and al_irq_enable() necessary?
>
> RTC ârtc_update_irqâ seem to have called 'spin_lock_irqsave' , where
> local irq will be disable.
>
>> +}
>> +
>> +/*
>> + * probe for dryice rtc device
>> + */
>> +static int dryice_rtc_probe(struct platform_device *pdev)
>> +{
>> + Â Â Â struct resource *res;
>> + Â Â Â struct imxdi_dev *imxdi;
>> + Â Â Â int rc;
>> +
>> + Â Â Â res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
>> + Â Â Â if (!res)
>> + Â Â Â Â Â Â Â return -ENODEV;
>> +
>> + Â Â Â imxdi = devm_kzalloc(&pdev->dev, sizeof(*imxdi), GFP_KERNEL);
>> + Â Â Â if (!imxdi)
>> + Â Â Â Â Â Â Â return -ENOMEM;
>> +
>> + Â Â Â imxdi->pdev = pdev;
>> +
>> + Â Â Â if (!devm_request_mem_region(&pdev->dev, res->start, resource_size(res),
>> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â pdev->name))
>> + Â Â Â Â Â Â Â return -EBUSY;
>> +
>> + Â Â Â imxdi->ioaddr = devm_ioremap(&pdev->dev, res->start,
>> + Â Â Â Â Â Â Â Â Â Â Â resource_size(res));
>> + Â Â Â if (imxdi->ioaddr == NULL)
>> + Â Â Â Â Â Â Â return -ENOMEM;
>> +
>> + Â Â Â imxdi->irq = platform_get_irq(pdev, 0);
>> + Â Â Â if (imxdi->irq < 0)
>> + Â Â Â Â Â Â Â return imxdi->irq;
>> +
>> + Â Â Â init_waitqueue_head(&imxdi->write_wait);
>> +
>> + Â Â Â INIT_WORK(&imxdi->work, dryice_work);
>> +
>> + Â Â Â mutex_init(&imxdi->write_mutex);
>> +
>> + Â Â Â imxdi->clk = clk_get(&pdev->dev, NULL);
>> + Â Â Â if (IS_ERR(imxdi->clk))
>> + Â Â Â Â Â Â Â return PTR_ERR(imxdi->clk);
>> + Â Â Â clk_enable(imxdi->clk);
>> +
>> + Â Â Â /*
>> + Â Â Â Â* Initialize dryice hardware
>> + Â Â Â Â*/
>> +
>> + Â Â Â /* mask all interrupts */
>> + Â Â Â __raw_writel(0, imxdi->ioaddr + DIER);
>> +
>> + Â Â Â rc = devm_request_irq(&pdev->dev, imxdi->irq, dryice_norm_irq,
>> + Â Â Â Â Â Â Â Â Â Â Â IRQF_SHARED, pdev->name, imxdi);
>> + Â Â Â if (rc) {
>> + Â Â Â Â Â Â Â dev_warn(&pdev->dev, "interrupt not available.\n");
>> + Â Â Â Â Â Â Â goto err;
>> + Â Â Â }
>> +
>> + Â Â Â /* put dryice into valid state */
>> + Â Â Â if (__raw_readl(imxdi->ioaddr + DSR) & DSR_NVF) {
>> + Â Â Â Â Â Â Â rc = di_write_wait(imxdi, DSR_NVF | DSR_SVF, DSR);
>> + Â Â Â Â Â Â Â if (rc)
>> + Â Â Â Â Â Â Â Â Â Â Â goto err;
>> + Â Â Â }
>> +
>> + Â Â Â /* initialize alarm */
>> + Â Â Â rc = di_write_wait(imxdi, DCAMR_UNSET, DCAMR);
>> + Â Â Â if (rc)
>> + Â Â Â Â Â Â Â goto err;
>> + Â Â Â rc = di_write_wait(imxdi, 0, DCALR);
>> + Â Â Â if (rc)
>> + Â Â Â Â Â Â Â goto err;
>> +
>> + Â Â Â /* clear alarm flag */
>> + Â Â Â if (__raw_readl(imxdi->ioaddr + DSR) & DSR_CAF) {
>> + Â Â Â Â Â Â Â rc = di_write_wait(imxdi, DSR_CAF, DSR);
>> + Â Â Â Â Â Â Â if (rc)
>> + Â Â Â Â Â Â Â Â Â Â Â goto err;
>> + Â Â Â }
>> +
>> + Â Â Â /* the timer won't count if it has never been written to */
>> + Â Â Â if (__raw_readl(imxdi->ioaddr + DTCMR) == 0) {
>> + Â Â Â Â Â Â Â rc = di_write_wait(imxdi, 0, DTCMR);
>> + Â Â Â Â Â Â Â if (rc)
>> + Â Â Â Â Â Â Â Â Â Â Â goto err;
>> + Â Â Â }
>> +
>> + Â Â Â /* start keeping time */
>> + Â Â Â if (!(__raw_readl(imxdi->ioaddr + DCR) & DCR_TCE)) {
>> + Â Â Â Â Â Â Â rc = di_write_wait(imxdi,
>> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â __raw_readl(imxdi->ioaddr + DCR) | DCR_TCE,
>> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â DCR);
>> + Â Â Â Â Â Â Â if (rc)
>> + Â Â Â Â Â Â Â Â Â Â Â goto err;
>> + Â Â Â }
>> +
>> + Â Â Â imxdi->rtc = rtc_device_register(pdev->name, &pdev->dev,
>> + Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â &dryice_rtc_ops, THIS_MODULE);
>> + Â Â Â if (IS_ERR(imxdi->rtc)) {
>> + Â Â Â Â Â Â Â rc = PTR_ERR(imxdi->rtc);
>> + Â Â Â Â Â Â Â goto err;
>> + Â Â Â }
>> + Â Â Â platform_set_drvdata(pdev, imxdi);

Setting drv private data prior to register rtc device can avoid that
'dev_get_drvdata' return NULL.

>> +
>> + Â Â Â return 0;
>> +
>> +err:
>> + Â Â Â clk_disable(imxdi->clk);
>> + Â Â Â clk_put(imxdi->clk);
>> +
>> + Â Â Â return rc;
>> +}
>> +
>> +static int __devexit dryice_rtc_remove(struct platform_device *pdev)
>> +{
>> + Â Â Â struct imxdi_dev *imxdi = platform_get_drvdata(pdev);
>> +
>> + Â Â Â flush_scheduled_work();
>> +
>> + Â Â Â /* mask all interrupts */
>> + Â Â Â __raw_writel(0, imxdi->ioaddr + DIER);
>> +
>> + Â Â Â rtc_device_unregister(imxdi->rtc);
>> +
>> + Â Â Â clk_disable(imxdi->clk);
>> + Â Â Â clk_put(imxdi->clk);
>> +
>> + Â Â Â return 0;
>> +}
>> +
>> +static struct platform_driver dryice_rtc_driver = {
>> + Â Â Â .driver = {
>> + Â Â Â Â Â Â Â Â Â.name = "imxdi_rtc",
>> + Â Â Â Â Â Â Â Â Â.owner = THIS_MODULE,
>> + Â Â Â Â Â Â Â Â Â},
>> + Â Â Â .probe = dryice_rtc_probe,
>> + Â Â Â .remove = __devexit_p(dryice_rtc_remove),
>> +};
>> +
>> +static int __init dryice_rtc_init(void)
>> +{
>> + Â Â Â return platform_driver_register(&dryice_rtc_driver);
>
> platform_driver_probe will be much better here.
>
>> +}
>> +
>> +static void __exit dryice_rtc_exit(void)
>> +{
>> + Â Â Â platform_driver_unregister(&dryice_rtc_driver);
>> +}
>> +
>> +module_init(dryice_rtc_init);
>> +module_exit(dryice_rtc_exit);
>> +
>> +MODULE_AUTHOR("Freescale Semiconductor, Inc.");
>> +MODULE_AUTHOR("Baruch Siach <baruch@xxxxxxxxxx>");
>> +MODULE_DESCRIPTION("IMX DryIce Realtime Clock Driver (RTC)");
>> +MODULE_LICENSE("GPL");
>> --
>> 1.7.1
>>
>> --
>> You received this message because you are subscribed to "rtc-linux".
>> Membership options at http://groups.google.com/group/rtc-linux .
>> Please read http://groups.google.com/group/rtc-linux/web/checklist
>> before submitting a driver.
>
>
>
> --
> *linux-arm-kernel mailing list
> mail addr:linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
> you can subscribe by:
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
>
> * linux-arm-NUC900 mailing list
> mail addr:NUC900@xxxxxxxxxxxxxxxx
> main web: https://groups.google.com/group/NUC900
> you can subscribe it by sending me mail:
> mcuos.com@xxxxxxxxx
>



--
*linux-arm-kernel mailing list
mail addr:linux-arm-kernel@xxxxxxxxxxxxxxxxxxx
you can subscribe by:
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

* linux-arm-NUC900 mailing list
mail addr:NUC900@xxxxxxxxxxxxxxxx
main web: https://groups.google.com/group/NUC900
you can subscribe it by sending me mail:
mcuos.com@xxxxxxxxx
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@xxxxxxxxxxxxxxx
More majordomo info at http://vger.kernel.org/majordomo-info.html
Please read the FAQ at http://www.tux.org/lkml/