Re: [PATCH -mm 1/2] scsi: remove dma_is_consistent usage in 53c700
From: James Bottomley
Date: Sun Jun 27 2010 - 11:08:57 EST
On Sun, 2010-06-27 at 19:10 +0900, FUJITA Tomonori wrote:
> 53c700 is the only user of dma_is_consistent():
> BUG_ON(!dma_is_consistent(hostdata->dev, pScript) && L1_CACHE_BYTES < dma_get_cache_alignment());
> The above code tries to see if the system can allocate coherent memory
> or not. It's for some old systems that can't allocate coherent memory
> at all (e.g some parisc systems).
Actually, that's not the right explanation. The BUG_ON is because of an
efficiency in the driver ... it's nothing to do with the architecture.
The driver uses a set of mailboxes, but for efficiency's sake, it packs
them into a single coherent area and separates the different usages by a
L1 cache stride). On architectures capable of manufacturing coherent
memory, this is a nice speed up in the DMA infrastructure. However, for
incoherent architectures, it's fatal if the dma coherence stride is
greater than the L1 cache size, because now we'll get data corruption
due to cacheline interference. That's what the BUG_ON is checking for.
> I think that we can safely remove the above usage:
> - such old systems haven't triger the above checking for long.
> - the above condition is important for systems that can't allocate
> coherent memory if these systems do DMA. So probably it would be
> better to have such checking in arch's DMA initialization code
> instead of a driver.
Well, we can't check in the architecture because it's a driver specific
thing ... I suppose making it a rule that dma_get_cache_alignment()
*must* be <= L1_CACHE_BYTES fixes it ... we seem to have no architecture
violating that, so just add it to the documentation, and the check can
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