TSC as clocksource

[Rob]

Want to use TSC as clocksource
have a Intel Core2 Duo with constant_tsc flag
TSC should be stable at C1 + C2, it is debatable whether C3 is stable

Using processor.max_cstate=2 to use only C1 + C2 changes nothing, still get
Monitor-Mwait will be used to enter C-3 state
there should be checks before this is forced

Please CC answers, comments to my email.

Attachment: tsc
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