Re: [PATCH 3/4] ARM: Xilinx: Adding timer support to the platform

From: Jamie Iles
Date: Mon Feb 07 2011 - 09:59:07 EST


On Mon, Feb 07, 2011 at 07:16:01AM -0700, John Linn wrote:
> > -----Original Message-----
> > From: Jamie Iles [mailto:jamie@xxxxxxxxxxxxx]
> > Sent: Saturday, February 05, 2011 6:04 PM
> > To: John Linn
> > Cc: linux-arm-kernel@xxxxxxxxxxxxxxxxxxx;
> linux-kernel@xxxxxxxxxxxxxxx; linux@xxxxxxxxxxxxxxxx;
> > catalin.marinas@xxxxxxx; glikely@xxxxxxxxxxxx; Kiran Sutariya
> > Subject: Re: [PATCH 3/4] ARM: Xilinx: Adding timer support to the
> platform
> >
> > Hi John,
> >
> > A couple more nitpicks.
> >
> > Jamie
> >
> > On Sat, Feb 05, 2011 at 09:17:16AM -0700, John Linn wrote:
> > > +static irqreturn_t xttcpss_clock_event_interrupt(int irq, void
> *dev_id)
> > > +{
> > > + struct clock_event_device *evt = &xttcpss_clockevent;
> > > + struct xttcpss_timer *timer = dev_id;
> > > + u32 ctrl_reg;
> > > +
> > > + /* Acknowledge the interrupt and call event handler */
> > > + xttcpss_write(timer->base_addr + XTTCPSS_ISR_OFFSET,
> > > + xttcpss_read(timer->base_addr + XTTCPSS_ISR_OFFSET));
> > > +
> > > + if (timer->mode == CLOCK_EVT_MODE_ONESHOT) {
> > > +
> > > + /* Disable the counter as it would keep running. */
> > > + ctrl_reg = xttcpss_read(timer->base_addr +
> > > + XTTCPSS_CNT_CNTRL_OFFSET);
> > > + ctrl_reg |= ~(XTTCPSS_CNT_CNTRL_ENABLE_MASK);
> >
> > The clock events framework should reprogram the next event so you
> don't
> > actually need to disable the timer here. Once the event handler has
> > been called the timer will be reenabled with a new period, and as
> we're
> > running with interrupts disabled here we don't need to stop the timer.
> >
>
> What about if there's not another event to be started?

Then the clockevents code can set the mode to CLOCK_EVT_MODE_SHUTDOWN
and this should disable the timer. For NOHZ, AFAICT the
clockevents/tick code will make sure that the next tick always falls
within your max_delta_ns.

Jamie
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