Re: [PATCH -tip] perf: x86, add SandyBridge support

From: Andi Kleen
Date: Thu Feb 24 2011 - 09:25:29 EST


On Thu, Feb 24, 2011 at 10:11:24PM +0800, Lin Ming wrote:
> On Thu, 2011-02-24 at 22:02 +0800, Andi Kleen wrote:
> > > + [ C(OP_READ) ] = {
> > > + [ C(RESULT_ACCESS) ] = 0x04d1, /* MEM_LOAD_UOPS_RETIRED.LLC_HIT */
> > > + [ C(RESULT_MISS) ] = 0x0,
> > > + },
> > > + [ C(OP_WRITE) ] = {
> > > + [ C(RESULT_ACCESS) ] = 0x0424, /* L2_RQSTS.RFO_HITS */
> > > + [ C(RESULT_MISS) ] = 0x0824, /* L2_RQSTS.RFO_MISS */
> >
> > No! You really need offcore here. L2 is not LLC!!!
> > See the offcore patchkit which fixes this for Nehalem.
>
> Yes, I know that.
> But I write it like this for now since the offcore patchkit has not been
> merged yet.

It's just wrong. Please don't merge more bugs.

-Andi

--
ak@xxxxxxxxxxxxxxx -- Speaking for myself only.
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