Re: [PATCH 5/6] x86, NMI: Allow NMI reason io port (0x61) to be processedon any CPU

From: Cyrill Gorcunov
Date: Sat Feb 26 2011 - 03:02:55 EST

On 02/23/2011 05:39 AM, Maciej W. Rozycki wrote:

[Catching up with old e-mail...]

In line with the comment above that you're removing -- have you (or
anyone else) adjusted code elsewhere so that external NMIs are actually
delivered to processors other than the BSP? I can't see such code in this
series nor an explanation as to why it wouldn't be needed.

For the record -- the piece of code above reflects our setup where the
LINT1 input is enabled and configured for the NMI delivery mode on the BSP
only and all the other processors have this line disabled in their local
APIC units. If system NMIs are to be handled after the removal of the
BSP, then another processor has to be selected and configured for NMI
reception. Alternatively, all local units could have their LINT1 input
enabled and arbitrate handling, although it would be quite disruptive as
all the processors would take the interrupt if it happened. OTOH it would
be more fault-tolerant in the case of a CPU failure. On a typical x86 box
the system NMI cannot be routed to an I/O APIC input.


Hi Maciej, good catch! The code doesn't reconfig LVT. As just Don pointed
it might be Intel is working on something, dunno. Probably we better should
drop this patch for now (at least until LVT reconfig would not be implemented).

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