Re: [PATCH]x86: flush tlb if PGD entry is changed in i386 PAE mode

From: Rik van Riel
Date: Wed Mar 16 2011 - 09:04:51 EST

On 03/15/2011 11:37 PM, Shaohua Li wrote:
According to intel CPU manual, every time PGD entry is changed in i386 PAE mode,
we need do a full TLB flush. Current code follows this and there is comment
for this too in the code. But current code misses the multi-threaded case. A
changed page table might be used by several CPUs, every such CPU should flush
Usually this isn't a problem, because we prepopulate all PGD entries at process
fork. But when the process does munmap and follows new mmap, this issue will be
triggered. When it happens, some CPUs will keep doing page fault.


Reported-by: Yasunori Goto<y-goto@xxxxxxxxxxxxxx>
Signed-off-by: Shaohua Li<>
Tested-by: Yasunori Goto<y-goto@xxxxxxxxxxxxxx>

Reviewed-by: Rik van Riel <riel@xxxxxxxxxx>

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