Re: [PATCH 4/4] perf, x86: Add PERF_COUNT_HW_NMI_WATCHDOG event

[Peter Zijlstra]

On Fri, 2011-04-22 at 13:24 +0400, Cyrill Gorcunov wrote:
> On Fri, Apr 22, 2011 at 12:54 PM, Peter Zijlstra <a.p.zijlstra@xxxxxxxxx> wrote:
> > On Fri, 2011-04-22 at 12:43 +0400, Cyrill Gorcunov wrote:
> >> we need a different event and counters for watchdog.
> >>
> > Does it count the same thing though? If so we could look at having
> > alternative encodings support (we might need something like that for
> > offcore too).
> >
> 
> Yes, they count the same thing (well some tech details are different but
> not much).By using different counters we are allowed to run them
> simultaneously which makes perf top works again.
> 
> Could you elaborate what you have in mind with "alternative encodings"
> here?

Right, so the idea is that one event (concept) has two (or more)
representations in the config space. And when scheduling the events we
find we have a conflict, we simply try the alternative encoding(s).

For example, with the offcore bits, we have two events: r1b7 and r1bb
that both have an extra MSR to fill (01A6 and 01A7 resp). Now if you
were to write the same value to these MSRs these events would count the
exact same thing.

So eg. for counting remote dram hits, you can use: r1b7:20ff or
r1bb:20ff, both count the same. So if we want to support a generic event
that counts remote dram hits we must pick one. Now if that one is taken
for measuring some L3 event, we'll have a conflict and not schedule the
thing, even though the other counter might be available.

POWER has something similar and has already implemented this alternative
encoding scheme.



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