Re: Question about iommu on x86_64 and radeon driver.
From: Daniel Haid
Date: Wed Jun 01 2011 - 17:58:15 EST
I have also found out the following. In
line 741 of drivers/gpu/drm/radeon/radeon_device.c
there is a comment "PCIE - can handle 40-bits." -
I have a PCIE card - and then need_dma32 is not set.
So if I read it correctly the ttm allocation
routines will allocate memory over 4GB.
But if PCIE can handle 40 bits, why does swiotlb
give out a bounce buffer to the radeon driver at all?
(dma_capable(dev, dev_addr, size) && !swiotlb_force)
on line 672 of lib/swiotlb.c be true?
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