Re: [V3][PATCH 6/6] x86, nmi: print out NMI stats in /proc/interrupts

[Robert Richter]

On 25.08.11 12:45:48, Don Zickus wrote:
> This is a cheap hack to add the stats to the middle of /proc/interrupts.
> It is more of a conversation starter than anything as I am not sure
> the right letters and place to put this stuff.
> 
> The benefit of these stats is a better breakdown of which list the NMIs
> get handled in either a normal handler, unknown, or external.  It also
> list the number of unknown NMIs swallowed to help check for false
> positives or not.  Another benefit is the ability to actually see which
> NMI handlers are currently registered in the system.
> 
> The output of 'cat /proc/interrupts/ will look like this:
> 
> <snip>
>  58:        275          0        864          0   PCI-MSI-edge      eth0
> NMI:       4161       4155        158       4194   Non-maskable interrupts
> SWA:          0          0          0          0   Unknown NMIs swallowed
>   0:       4161       4155        158       4194   NMI  PMI, arch_bt

What does the "0" stand for?

We could easily provide a statistic for each NMI handler, which would
be more useful.

The syntax of the NMI printout is not yet perfect, so before adding it
as a new interface I would rather wait a bit to discuss this more.

People also could get confused because the handled count may be
different to nmi count. This should be documented more clearly, maybe
as event count instead of nmi count or so.

-Robert

> UNK:          0          0          0          0   NMI
> EXT:          0          0          0          0   NMI
> LOC:      12653      13304      13974      12926   Local timer interrupts
> SPU:          0          0          0          0   Spurious interrupts
> PMI:          6          6          5          6   Performance monitoring interrupts
> IWI:          0          0          0          0   IRQ work interrupts
> RES:       1839       1897       1821       1854   Rescheduling interrupts
> CAL:        524       2714        392        331   Function call interrupts
> TLB:        217        146        593        576   TLB shootdowns
> TRM:          0          0          0          0   Thermal event interrupts
> THR:          0          0          0          0   Threshold APIC interrupts
> MCE:          0          0          0          0   Machine check exceptions
> MCP:          1          1          1          1   Machine check polls
> ERR:          0
> MIS:          0

-- 
Advanced Micro Devices, Inc.
Operating System Research Center

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