Re: PME via interrupt or SCI mechanism?
From: Rafael J. Wysocki
Date: Sat Oct 01 2011 - 16:27:45 EST
On Saturday, October 01, 2011, Sarah Sharp wrote:
> On Fri, Sep 30, 2011 at 10:21:06PM +0200, Rafael J. Wysocki wrote:
> > OK, please test the appended patch. The difference is that it should only
> > continuously poll devices that don't get notifications. You'll still see
> > the debug messages from your previous patches, but this one should be a bit
> > less wasteful than the previous one in general.
> This patch seems to work. The GPE fires and the xHCI host controller
> comes out of D3 after a stream of:
> Sep 30 17:07:32 talon kernel: [ 197.745312] ehci_hcd 0000:00:1d.0: pci_acpi_wake_dev
> Sep 30 17:07:32 talon kernel: [ 197.745321] ehci_hcd 0000:00:1a.0: pci_acpi_wake_dev
> Sep 30 17:07:32 talon kernel: [ 197.745326] snd_hda_intel 0000:00:1b.0: pci_acpi_wake_dev
> Sep 30 17:07:32 talon kernel: [ 197.745331] e1000e 0000:00:19.0: pci_acpi_wake_dev
> It does seem to take less time to come out of D3 than the previous patch
> I occasionally do not see the host controller come out of D3 when I plug
> in a new device, but the interrupt count for GPE 0D doesn't increment
> when that happens, so it's probably just a BIOS or hardware bug.
I think the controller doesn't signal PME in those cases.
> Did mention this was bleeding edge hardware?
No, you didn't, but that doesn't matter a lot. Bugs of this kind are found in
systems being sold in the market too and we need to work around them anyway. :-(
Thanks for testing the patch, I'll resent it with a changelog shortly.
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