Re: [PATCH 13/26] ARM: pxa: use correct __iomem annotations

[Eric Miao]

On Sun, Oct 2, 2011 at 4:03 AM, Arnd Bergmann <arnd@xxxxxxxx> wrote:
> This tries to clear up the confusion between integers and iomem pointers
> in the marvell pxa platform. MMIO addresses are supposed to be __iomem*
> values, in order to let the Linux type checking work correctly. This
> patch moves the cast to __iomem as far back as possible, to the place
> where the MMIO virtual address windows are defined.
>
> Signed-off-by: Arnd Bergmann <arnd@xxxxxxxx>
> ---
> Âarch/arm/include/asm/hardware/it8152.h  Â|  Â2 +-
> Âarch/arm/mach-mmp/clock.h         |  Â8 ++++----
> Âarch/arm/mach-mmp/common.c        Â|  Â4 ++--
> Âarch/arm/mach-mmp/include/mach/addr-map.h | Â 10 ++++++++--
> Âarch/arm/mach-mmp/mmp2.c         Â|  Â3 ++-
> Âarch/arm/mach-pxa/balloon3.c       Â|  10 +++++-----
> Âarch/arm/mach-pxa/cm-x2xx-pci.c      |  Â2 +-
> Âarch/arm/mach-pxa/cm-x2xx.c        |  Â4 ++--
> Âarch/arm/mach-pxa/include/mach/addr-map.h | Â Â8 ++++----
> Âarch/arm/mach-pxa/include/mach/balloon3.h | Â Â2 +-
> Âarch/arm/mach-pxa/include/mach/hardware.h | Â Â9 +++++----
> Âarch/arm/mach-pxa/include/mach/lpd270.h  |  Â4 ++--
> Âarch/arm/mach-pxa/include/mach/mtd-xip.h Â| Â Â1 -
> Âarch/arm/mach-pxa/include/mach/palmtx.h  |  Â6 +++---
> Âarch/arm/mach-pxa/include/mach/smemc.h  Â|  Â2 +-
> Âarch/arm/mach-pxa/include/mach/zeus.h   |  Â4 ++--
> Âarch/arm/mach-pxa/irq.c          |  Â4 ++--
> Âarch/arm/mach-pxa/lpd270.c        Â|  Â2 +-
> Âarch/arm/mach-pxa/palmtx.c        Â|  Â8 ++++----
> Âarch/arm/mach-pxa/pxa25x.c        Â|  Â2 +-
> Âarch/arm/mach-pxa/pxa27x.c        Â|  Â2 +-
> Âarch/arm/mach-pxa/pxa3xx.c        Â|  Â2 +-
> Âarch/arm/mach-pxa/zeus.c         Â|  Â8 ++++----
> Âarch/arm/plat-pxa/gpio.c         Â|  Â2 +-
> Âarch/arm/plat-pxa/include/plat/mfp.h   Â|  Â2 +-
> Âarch/arm/plat-pxa/mfp.c          |  Â4 ++--
> Âdrivers/pcmcia/pxa2xx_balloon3.c     Â|  Â2 +-
> Âdrivers/video/mbx/mbxfb.c         |  Â6 +++---
> Â28 files changed, 65 insertions(+), 58 deletions(-)
>
> diff --git a/arch/arm/include/asm/hardware/it8152.h b/arch/arm/include/asm/hardware/it8152.h
> index b3fea38..43cab49 100644
> --- a/arch/arm/include/asm/hardware/it8152.h
> +++ b/arch/arm/include/asm/hardware/it8152.h
> @@ -9,7 +9,7 @@
>
> Â#ifndef __ASM_HARDWARE_IT8152_H
> Â#define __ASM_HARDWARE_IT8152_H
> -extern unsigned long it8152_base_address;
> +extern void __iomem *it8152_base_address;
>
> Â#define IT8152_IO_BASE Â Â Â Â Â Â Â Â (it8152_base_address + 0x03e00000)
> Â#define IT8152_CFGREG_BASE Â Â Â Â Â Â (it8152_base_address + 0x03f00000)
> diff --git a/arch/arm/mach-mmp/clock.h b/arch/arm/mach-mmp/clock.h
> index 3143e99..149b30c 100644
> --- a/arch/arm/mach-mmp/clock.h
> +++ b/arch/arm/mach-mmp/clock.h
> @@ -30,7 +30,7 @@ extern struct clkops apmu_clk_ops;
>
> Â#define APBC_CLK(_name, _reg, _fnclksel, _rate) Â Â Â Â Â Â Â Â Â Â Â Â\
> Âstruct clk clk_##_name = { Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â \
> -        .clk_rst    Â= (void __iomem *)APBC_##_reg, Â\
> +        .clk_rst    Â= APBC_##_reg,         Â\
>        Â.fnclksel    = _fnclksel,          Â\
>        Â.rate      = _rate,            Â\
>        Â.ops      Â= &apbc_clk_ops,        Â\
> @@ -38,7 +38,7 @@ struct clk clk_##_name = { Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â\
>
> Â#define APBC_CLK_OPS(_name, _reg, _fnclksel, _rate, _ops) Â Â Â\
> Âstruct clk clk_##_name = { Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â \
> -        .clk_rst    Â= (void __iomem *)APBC_##_reg, Â\
> +        .clk_rst    Â= APBC_##_reg,         Â\
>        Â.fnclksel    = _fnclksel,          Â\
>        Â.rate      = _rate,            Â\
>        Â.ops      Â= _ops,             \
> @@ -46,7 +46,7 @@ struct clk clk_##_name = { Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â\
>
> Â#define APMU_CLK(_name, _reg, _eval, _rate) Â Â Â Â Â Â Â Â Â Â\
> Âstruct clk clk_##_name = { Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â \
> -        .clk_rst    Â= (void __iomem *)APMU_##_reg, Â\
> +        .clk_rst    Â= APMU_##_reg,         Â\
>        Â.enable_val   = _eval,            Â\
>        Â.rate      = _rate,            Â\
>        Â.ops      Â= &apmu_clk_ops,        Â\
> @@ -54,7 +54,7 @@ struct clk clk_##_name = { Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â\
>
> Â#define APMU_CLK_OPS(_name, _reg, _eval, _rate, _ops) Â Â Â Â Â\
> Âstruct clk clk_##_name = { Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â \
> -        .clk_rst    Â= (void __iomem *)APMU_##_reg, Â\
> +        .clk_rst    Â= APMU_##_reg,         Â\
>        Â.enable_val   = _eval,            Â\
>        Â.rate      = _rate,            Â\
>        Â.ops      Â= _ops,             \
> diff --git a/arch/arm/mach-mmp/common.c b/arch/arm/mach-mmp/common.c
> index 0ec0ca8..5720674 100644
> --- a/arch/arm/mach-mmp/common.c
> +++ b/arch/arm/mach-mmp/common.c
> @@ -27,12 +27,12 @@ EXPORT_SYMBOL(mmp_chip_id);
> Âstatic struct map_desc standard_io_desc[] __initdata = {
> Â Â Â Â{
>        Â.pfn      Â= __phys_to_pfn(APB_PHYS_BASE),
> -        .virtual    Â= APB_VIRT_BASE,
> +        .virtual    Â= (unsigned long)APB_VIRT_BASE,
>        Â.length     = APB_PHYS_SIZE,
>        Â.type      = MT_DEVICE,
> Â Â Â Â}, {
>        Â.pfn      Â= __phys_to_pfn(AXI_PHYS_BASE),
> -        .virtual    Â= AXI_VIRT_BASE,
> +        .virtual    Â= (unsigned long)AXI_VIRT_BASE,
>        Â.length     = AXI_PHYS_SIZE,
>        Â.type      = MT_DEVICE,
> Â Â Â Â},
> diff --git a/arch/arm/mach-mmp/include/mach/addr-map.h b/arch/arm/mach-mmp/include/mach/addr-map.h
> index 3254089..3e404ac 100644
> --- a/arch/arm/mach-mmp/include/mach/addr-map.h
> +++ b/arch/arm/mach-mmp/include/mach/addr-map.h
> @@ -11,6 +11,12 @@
> Â#ifndef __ASM_MACH_ADDR_MAP_H
> Â#define __ASM_MACH_ADDR_MAP_H
>
> +#ifndef __ASSEMBLER__
> +#define IOMEM(x) Â Â Â ((void __iomem *)(x))
> +#else
> +#define IOMEM(x) Â Â Â (x)
> +#endif
> +
> Â/* APB - Application Subsystem Peripheral Bus
> Â*
> Â* NOTE: the DMA controller registers are actually on the AXI fabric #1
> @@ -18,11 +24,11 @@
> Â* peripherals on APB, let's count it into the ABP mapping area.
> Â*/
> Â#define APB_PHYS_BASE Â Â Â Â Â0xd4000000
> -#define APB_VIRT_BASE Â Â Â Â Â0xfe000000
> +#define APB_VIRT_BASE Â Â Â Â ÂIOMEM(0xfe000000)

To be honest, I'd really like to keep the *_VIRT_BASE definitions to be
type independent.

And have the actual register definitions to be casted to void __iomem *
when being defined, e.g.

#define APBC_REG(x)	IOMEM(APBC_VIRT_BASE + (x))

#define APBC_UART1	APBC_REG(0x000)

Arnd, do we have some standard guidelines on this for all SoCs
to follow? As I know, it's currently still being a mess.
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