Re: [PATCH] perf: make perf.data more self-descriptive (v8)

[Robert Richter]

On 01.12.11 16:01:55, Frederic Weisbecker wrote:
> On Wed, Nov 30, 2011 at 02:49:46PM -0200, acme@xxxxxxxxxx wrote:
> > Em Wed, Nov 30, 2011 at 04:08:29PM +0100, Robert Richter escreveu:
> > > On 29.11.11 10:35:24, Stephane Eranian wrote:
> > > >         sec_start = header->data_offset + header->data_size;
> > > >         lseek(fd, sec_start + sec_size, SEEK_SET);
> > > > 
> > > >         err = do_write_feat(fd, header, HEADER_TRACE_INFO, &p, evlist);
> > > >         if (err)
> > > >                 goto out_free;
> > > > 
> > > >         err = do_write_feat(fd, header, HEADER_BUILD_ID, &p, evlist);
> > > >         if (err) {
> > > >                 perf_header__clear_feat(header, HEADER_BUILD_ID);
> > > >                 goto out_free;
> > > >         }
> > 
> > > > The 'clear_feat' is missing for TRACE_INFO, that's all. The question is:
> > > > is case do_write_feat(trace_info) fails, is there still a way to parse the file
> > > > correctly? If not, then perf should bail out, if yes, then we need to add the
> > > > clear_feat(TRACE_INFO) in case of error.
> > 
> > > The question is, if do_write_feat() fails for HEADER_TRACE_INFO or
> > > HEADER_BUILD_ID then perf_header__adds_write() fails. A failure of any
> > > other feature simple disables it by calling clear_feat(). I noticed
> > > this asymmetry and wonder why?
> 
> Not sure either. I must confess I didn't write that fixup part...

I am asking this because I want to change code in a way that treats
all features the same, that is just to disable the feature bit on
failure and then continue anyway.

> 
> > > 
> > > Also, is there a reason why HEADER_TRACE_INFO starts with bit 1 instead
> > > of bit 0. Is bit 0 reserved for some reason?
> 
> Looks like a mistake I made from the beginning. And we can't really fix that
> without breaking all perf.data :)

Ok, wasn't sure if the bit was used for other purposes, but seems to
be always zero then.

Thanks,

-Robert

-- 
Advanced Micro Devices, Inc.
Operating System Research Center

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