Re: [PATCH 5/7 v6] drm/i915/intel_i2c: use INDEX cycles for i2c read transactions

From: Chris Wilson
Date: Wed Mar 28 2012 - 14:52:32 EST

On Thu, 29 Mar 2012 02:26:37 +0800, Daniel Kurtz <djkurtz@xxxxxxxxxxxx> wrote:
> It is very common for an i2c device to require a small 1 or 2 byte write
> followed by a read. For example, when reading from an i2c EEPROM it is
> common to write and address, offset or index followed by a reading some
> values.

Hmm, I have

"gmbus1, bits 8-15: 8-bit GMBUS slave register
This field is redundant and should not be used."

Scary. :)

Otherwise, the code itself looks correct and quite neatly done now.

Chris Wilson, Intel Open Source Technology Centre
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