Re: [PATCH 4/7 v6] drm/i915/intel_i2c: use WAIT cycle, not STOP
From: Daniel Kurtz
Date: Thu Mar 29 2012 - 04:39:41 EST
On Thu, Mar 29, 2012 at 2:48 AM, Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> wrote:
> On Thu, 29 Mar 2012 02:26:36 +0800, Daniel Kurtz <djkurtz@xxxxxxxxxxxx> wrote:
>> The i915 is only able to generate a STOP cycle (i.e. finalize an i2c
>> transaction) during a DATA or WAIT phase. In other words, the
>> controller rejects a STOP requested as part of the first transaction in a
> The original docs have "this can only cause a STOP to be generated if a
> GMBUS cycle is generated, the GMBUS is currently in a data phase, or it
> is in a WAIT phase."
> So from that it seems STOP | INDEX? | WAIT is always a valid
> combination and is explicitly listed in the register set.
> I defer to actual testing though ;)
Unfortunately, STOP on first transaction didn't work for me :(.
Perhaps the docs are missing a "when":
"this can only cause a STOP to be generated if a GMBUS cycle is
generated *when* the GMBUS is currently in a data phase, or it is in a
> Chris Wilson, Intel Open Source Technology Centre
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