Re: [PATCH v4 2/3] serial/8250_pci: Clear FIFOs for Intel ME SerialOver Lan device on BI

[Greg KH]

On Wed, Apr 18, 2012 at 03:36:40PM -0700, Dan Williams wrote:
> On Wed, Apr 18, 2012 at 3:12 PM, Greg KH <gregkh@xxxxxxxxxxxxxxxxxxx> wrote:
> > On Tue, Apr 10, 2012 at 02:10:58PM -0700, Dan Williams wrote:
> >> From: Sudhakar Mamillapalli <sudhakar@xxxxxx>
> >>
> >> When using Serial Over Lan (SOL) over the virtual serial port in a Intel
> >> management engine (ME) device, on device reset the serial FIFOs need to
> >> be cleared to keep the FIFO indexes in-sync between the host and the
> >> engine.
> >>
> >> On a reset the serial device assertes BI, so using that as a cue FIFOs
> >> are cleared.  So for this purpose a new handle_break callback has been
> >> added.  One other problem is that the serial registers might temporarily
> >> go to 0 on reset of this device.  So instead of using the IER register
> >> read, if 0 returned use the ier value in uart_8250_port. This is hidden
> >> under a custom serial_in.
> >>
> >> Cc: Nhan H Mai <nhan.h.mai@xxxxxxxxx>
> >> Signed-off-by: Sudhakar Mamillapalli <sudhakar@xxxxxx>
> >> Acked-by: Alan Cox <alan@xxxxxxxxxxxxxxx>
> >> Signed-off-by: Dan Williams <dan.j.williams@xxxxxxxxx>
> >
> > What tree did you make this against?
> >
> > It fails with:
> > patching file drivers/tty/serial/8250/8250.c
> > patching file drivers/tty/serial/8250/8250.h
> > patching file drivers/tty/serial/8250/8250_pci.c
> > Hunk #2 FAILED at 1093.
> > 1 out of 2 hunks FAILED -- saving rejects to file drivers/tty/serial/8250/8250_pci.c.rej
> >
> > While that file hasn't been changed since it was moved to that location.
> >
> > Any ideas?
> 
> Hmm, I think this is because this patch depends on the reverts went
> into 3.4 via tty-linus.

Ah, ok, that makes more sense, let me go merge 3.4-rc3 into tty-next and
see if that solves the problem...

Yup, it did, thanks, I'll go apply these two patches now, sorry for the
noise.

greg k-h
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