Re: [PATCH v5 6/7] x86/tlb: optimizing flush_tlb_mm

[Peter Zijlstra]

On Wed, 2012-05-16 at 14:46 +0800, Alex Shi wrote:
> diff --git a/include/asm-generic/tlb.h b/include/asm-generic/tlb.h
> index 75e888b..ed6642a 100644
> --- a/include/asm-generic/tlb.h
> +++ b/include/asm-generic/tlb.h
> @@ -86,6 +86,8 @@ struct mmu_gather {
>  #ifdef CONFIG_HAVE_RCU_TABLE_FREE
>         struct mmu_table_batch  *batch;
>  #endif
> +       unsigned long           start;
> +       unsigned long           end;
>         unsigned int            need_flush : 1, /* Did free PTEs */
>                                 fast_mode  : 1; /* No batching   */
>  
> diff --git a/mm/memory.c b/mm/memory.c
> index 6105f47..b176172 100644
> --- a/mm/memory.c
> +++ b/mm/memory.c
> @@ -206,6 +206,8 @@ void tlb_gather_mmu(struct mmu_gather *tlb, struct mm_struct *mm, bool fullmm)
>         tlb->mm = mm;
>  
>         tlb->fullmm     = fullmm;
> +       tlb->start      = -1UL;
> +       tlb->end        = 0;
>         tlb->need_flush = 0;
>         tlb->fast_mode  = (num_possible_cpus() == 1);
>         tlb->local.next = NULL;
> @@ -248,6 +250,8 @@ void tlb_finish_mmu(struct mmu_gather *tlb, unsigned long start, unsigned long e
>  {
>         struct mmu_gather_batch *batch, *next;
>  
> +       tlb->start = start;
> +       tlb->end   = end;
>         tlb_flush_mmu(tlb);
>  
>         /* keep the page table cache within bounds */
> @@ -1204,6 +1208,8 @@ again:
>          */
>         if (force_flush) {
>                 force_flush = 0;
> +               tlb->start = addr;
> +               tlb->end = end;
>                 tlb_flush_mmu(tlb);
>                 if (addr != end)
>                         goto again; 


ARGH.. no. What bit about you don't need to modify the generic code
don't you get?

Both ARM and IA64 (and possible others) already do range tracking, you
don't need to modify mm/memory.c _AT_ALL_.

Also, if you modify include/asm-generic/tlb.h to include the ranges it
would be very nice to make that optional, most archs using it won't use
this.

Now IF you're going to change the tlb interface like this, you're going
to get to do it for all architectures, along with a sane benchmark to
show its beneficial to track ranges like this.

But as it stands, people are still questioning the validity of your
mprotect micro-bench, so no, you don't get to change the tlb interface.
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