Re: [PATCH] RAS: Add a tracepoint for reporting memory controllerevents

[Chen Gong]

ä 2012/6/1 17:10, Borislav Petkov åé:
> On Thu, May 31, 2012 at 08:52:21PM +0000, Luck, Tony wrote:
>>> It could be very quiet (i.e., machine runs with no errors) and
>>> it could have bursts where it reports a large number of errors
>>> back-to-back depending on access patterns, DIMM health,
>>> temperature, sea level and at least a bunch more factors.
>> 
>> Yes - the normal case is a few errors from stray neutrons ...
>> perhaps a few per month, maybe on a very big system a few per
>> hour.  When something breaks, especially if it affects a wide
>> range of memory addresses, then you will see a storm of errors.
> 
> IOW, when the sh*t hits the fan :-)
> 
>>> So I can imagine buffers filling up suddenly and fast, and
>>> userspace having hard time consuming them in a timely manner.
>> 
>> But I'm wondering what agent is going to be reporting all these 
>> errors.  Intel has CMCI - so you can get a storm of interrupts 
>> which would each generate a trace record ... but we are working 
>> on a patch to turn off CMCI if a storm is detected.
> 
> Yeah, about that. What are you guys doing about losing CECCs when 
> throttling is on, I'm assuming there's no way around it?
> 

This week I'm busy in doing other work so I have no time to do further
debug on Thomas' patch. I will continue to work on in the next days...
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