Re: [RFC] x86: mtrr: Constrain WB MTRR to max phys mem prior to cleanup

From: Zhenzhong Duan
Date: Fri Sep 28 2012 - 22:43:01 EST


On 2012-09-29 01:37, Peter Hurley wrote:
On Sun, 2012-09-09 at 23:54 -0400, zhenzhong.duan wrote:
On 2012-09-08 02:40, H. Peter Anvin wrote:
On 09/07/2012 10:44 AM, Peter Hurley wrote:

diff --git a/arch/x86/kernel/cpu/mtrr/cleanup.c
b/arch/x86/kernel/cpu/mtrr/cleanup.c
I really don't like it as it introduces yet another user of max_pfn,
which should be going away. Furthermore, the better question is what
remaining needs there are for MTRR cleanup; historically the reason
was that it prevented the display from being mapped WC via MTRR due to
the MTRR conflict resolution rules favoring UC.
For a large memory system, mtrr_cleanup offten fail in most case. Even
if it succeed, it often occupy all of MTRR entrys.
How was display mapped as WC in above case?
Without this patch, mtrr_cleanup could not optimize. The original MTRR
setup from BIOS remained, which left the display as UC (and a lot of log
spew).
Hi,
I am confused here.
Does HPA means mtrr_cleanup's purpose is to occupy all mtrr entrys and prevent display setting a WC entry in it?
As page level will do that in current code? If it is, then mtrr_cleanup could be removed now.

Why did bios give a lot of space then real mem, for hotplug?
I assume the reason was for hotplug.

An interesting side note: more recent revisions of this BIOS (rev. A11)
report one less variable MTRR (so, IA32_MTRRCAP is writable?)
From manual, it's readonly, writing it will lead to #GP.

However, the right way to fix that is to use the PAT interfaces, which
doesn't have this drawback -- then MTRR cleanup becomes entirely
superfluous and the problem goes away.
Do you mean disable MTRR totally here?
Well, since PAT entries marked WC override all MTRR settings, whatever
the BIOS set the variable MTRRs to becomes irrelevant, so not disabled
but rather ignored.
Oh, I see, WC in page level take precedence. Is the fix already in upstream?
thanks
zduan
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