On 10/29/2012 11:18 AM, Laxman Dewangan wrote:Tegra20/Tegra30 supports the spi interface through its SLINKI think it depends on DMAENGINE, not the specific driver now, doesn't it?
controller. Add spi driver for SLINK controller.
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
+config SPI_TEGRA20_SLINK
+ tristate "Nvidia Tegra20/Tegra30 SLINK Controller"
+ depends on ARCH_TEGRA&& TEGRA20_APB_DMA
+ x = 0;The if and the else there are basically identical now. Can't the else
+ for (i = 0; nbytes&& (i< tspi->bytes_per_word);
+ i++, nbytes--)
+ x |= ((*tx_buf++)<< i*8);
+ tegra_slink_writel(tspi, x, SLINK_TX_FIFO);
+ }
+ }
branch simply be replaced by the if branch? At most I think the
difference comes down to max_n_32bit v.s. fifo_words_left calculations
being slight different; everything else is the same.
I suppose this isn't a big deal though; we could clean it up later if
necessary.
udelay() is suggetsed by ASIC.+ val |= SLINK_PACKED;Why the udelay() and wmb()?
+ tegra_slink_writel(tspi, val, SLINK_DMA_CTL);
+ udelay(1);
+ wmb();
Fine, I will do this,+static int tegra_slink_runtime_resume(struct device *dev)Why not move the body of tegra_slink_clk_{un,prepare} inside those
+{
+ struct spi_master *master = dev_get_drvdata(dev);
+ struct tegra_slink_data *tspi = spi_master_get_devdata(master);
+
+ return tegra_slink_clk_prepare(tspi);
+}
functions, since they're only called from those functions?
Yes, I will correct it.+MODULE_ALIAS("platform:tegra_slink-slink");I think that's a typo.