Re: [PATCH 4/5] perf, amd: Enable northbridge performance counterson AMD family 15h

[Jacob Shin]

On Tue, Nov 27, 2012 at 01:10:51PM +0100, Robert Richter wrote:
> One minor comment:
> 
> On 26.11.12 16:48:30, Jacob Shin wrote:
> >  __init int amd_pmu_init(void)
> >  {
> >  	/* Performance-monitoring supported from K7 and later: */
> > @@ -666,6 +749,10 @@ __init int amd_pmu_init(void)
> >  	setup_event_constraints();
> >  	setup_perfctr_core();
> >  
> > +	num_core_counters = x86_pmu.num_counters;
> 
> I would better move this to setup_perfctr_nb().

Okay, see revised patch 4/5 below

> 
> > +
> > +	setup_perfctr_nb();
> > +
> >  	/* Events are common for all AMDs */
> >  	memcpy(hw_cache_event_ids, amd_hw_cache_event_ids,
> >  	       sizeof(hw_cache_event_ids));
> 
> Otherwise the whole patch set looks good.
> 
> Acked-by: Robert Richter <rric@xxxxxxxxxx>

Great! Thanks for taking the time!

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