Re: [PATCH v2] lpc_ich: fix gpio base and control offsets

[Samuel Ortiz]

Hi Aaron,

On Tue, Jan 15, 2013 at 02:42:45PM -0600, Aaron Sierra wrote:
> In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
> offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
> properly be enabled (and disabled) for these chipsets.
> 
> Signed-off-by: Agócs Pál <agocs.pal.86@xxxxxxxxx>
> Signed-off-by: Aaron Sierra <asierra@xxxxxxxxxxx>
> ---
>  drivers/mfd/lpc_ich.c |   40 ++++++++++++++++++++++------------------
>  1 file changed, 22 insertions(+), 18 deletions(-)
I'm fine with the gpio base and offset fixes, but the
s/id->driver_data/lpc_ich_chipset/ changes are not very nice.
It's probably time to introduce an lpc_ich_prv struct that would contain the
device id and also the 2 acpi_save and gpio_save static variable. You allocate
it in your probe routine and hook it to your pci_dev pointer through
pci_set_drvdata().
pci_get_drvdata() will help you fetch that structure back from your pci_dev
pointer. The driver will overall look cleaner this way.

Cheers,
Samuel.

-- 
Intel Open Source Technology Centre
http://oss.intel.com/
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