Re: [PATCH v3] lpc_ich: fix gpio base and control offsets

[Samuel Ortiz]

Hi Anatol,

On Thu, Feb 14, 2013 at 02:48:05PM -0800, Anatol Pomozov wrote:
> Hi, Aaron
> 
> On Sun, Feb 3, 2013 at 9:02 AM, Samuel Ortiz <sameo@xxxxxxxxxxxxxxx> wrote:
> > Hi Arron,
> >
> > On Thu, Jan 24, 2013 at 02:52:39PM -0600, Aaron Sierra wrote:
> >> In ICH5 and earlier the GPIOBASE and GPIOCTRL registers are found at
> >> offsets 0x58 and 0x5C, respectively. This patch allows GPIO access to
> >> properly be enabled (and disabled) for these chipsets.
> >>
> >> Signed-off-by: Agócs Pál <agocs.pal.86@xxxxxxxxx>
> >> Signed-off-by: Aaron Sierra <asierra@xxxxxxxxxxx>
> >> ---
> >>  drivers/mfd/lpc_ich.c |  109 ++++++++++++++++++++++++++++++++++---------------
> >>  1 file changed, 76 insertions(+), 33 deletions(-)
> > I applied this one to my for-next branch, but:
> >
> >
> >> @@ -858,14 +874,35 @@ wdt_done:
> >>  static int lpc_ich_probe(struct pci_dev *dev,
> >>                               const struct pci_device_id *id)
> >>  {
> >> +     struct lpc_ich_priv *priv;
> >>       int ret;
> >>       bool cell_added = false;
> >>
> >> -     ret = lpc_ich_init_wdt(dev, id);
> >> +     priv = kmalloc(GFP_KERNEL, sizeof(struct lpc_ich_priv));
> >> +     if (!priv)
> >> +             return -ENOMEM;
> > Could you please come back to me with a follow up patch that would convert
> > this to the devm_kzalloc() API ?
> 
> I compiled linux-next (sha == 019f4bc86a462), tried to boot it on my
> machine and it fails at the very early stage with following oops:
Would you mind trying the following fix:

diff --git a/drivers/mfd/lpc_ich.c b/drivers/mfd/lpc_ich.c
index 5c2ef41..fddc8e2 100644
--- a/drivers/mfd/lpc_ich.c
+++ b/drivers/mfd/lpc_ich.c
@@ -916,7 +916,7 @@ static int lpc_ich_probe(struct pci_dev *dev,
        int ret;
        bool cell_added = false;
 
-       priv = kmalloc(GFP_KERNEL, sizeof(struct lpc_ich_priv));
+       priv = kzalloc(sizeof(struct lpc_ich_priv), GFP_KERNEL);
        if (!priv)
                return -ENOMEM;

Cheers,
Samuel.

-- 
Intel Open Source Technology Centre
http://oss.intel.com/
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